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I'm trying to understand the relation among CAN clock frequency, Baud Rate Prescaler (BRP), Bus Baud rate and Bit Time. What is the relation between these 4 terms? How to get the Bus Baud Rate? I knew the Bit time is composed of 4 segments. How to drive the Bit Time?

Microcontroller TM4C123G.

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  • \$\begingroup\$ That would depend on the device that implements the CAN. There is no general answer, and you are not telling which device you are using. Please add the information to the question. \$\endgroup\$
    – Justme
    Commented Oct 5, 2021 at 5:02

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I'm trying to understand the relation among CAN clock frequency, Baud Rate Prescaler (BRP), Bus Baud rate and Bit Time.

Bus Baud Rate is self explanatory: It's the baud rate that the devices on the bus communicate at. So the devices should have the same baud rate for proper communication.

Baud Rate Prescaler is actually a divider. For example, if the device (e.g. MCU) supports CAN 2.0 with a max baud of 1 Mbps then a prescaler (i.e. divider) of 1, 2, 4, 8, etc will set the communication baud rate of the device to 1 Mbps, 500 kbps, 250 kbps, 125 kbps, etc respectively.

CAN clock frequency and bit time are device-dependent parameters. For example, the CAN clock can be one eighth of the device system clock (e.g. if the device is running at 80 MHz then the CAN clock will be 10 MHz). When you set the baud rate of the device it adjusts the bit time for proper synchronization, thus communication among the other devices on the bus. For proper sampling when receiving, you should adjust sampling points with adjustment parameters called "time quantum", which is obtained from CAN clock (e.g. for a 10MHz CAN clock the time quantum will be 100 nanoseconds). There's no exact values for these. You should refer to tech documents, applications samples, etc of the device you're using or planning to use.

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  • \$\begingroup\$ If the communication baud rate 500 kbps, would it be the bit time 1/500kbps = 2 use, and this bit time is composed of 4 segments? \$\endgroup\$
    – Mission YE
    Commented Oct 5, 2021 at 5:31
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    \$\begingroup\$ @MissionYE bit time will be 2 microseconds, yes. And it's composed of 4 segments: Sync, propagation, phase1, phase2. Sync is constant and fixed yet the rest are device-dependent, and programmable with time quantums. \$\endgroup\$ Commented Oct 5, 2021 at 5:50
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First, to make sure the terminology isn't confusing: baudrate means data items per second and bitrate means bits per second. In case of CAN, baudrate = bitrate.

Start here: What are the most common causes of CAN bus communication errors? Regarding clocks specifically, we can learn the following from that post:

The baudrate also needs to be fairly accurate - the standard (CAN 2.0B chp 9) mandates at least 1.58% clock accuracy from each node. I'd personally recommend to keep it below 1%. Some rule of thumb from the standard is that when you need speeds of 250kbps or faster you should avoid RC oscillators/ceramic resonators and use quartz. If you are using a MCU with built-in RC oscillator, check the specified accuracy.

Furthermore, the CAN controller setting of the various time quanta that each bit consists of, needs to be configured so that the sample point of each bit is as close to the recommended 87.5% of the bit length as possible (CANopen DS301 chp 7.2). Ideally done by having 16 tq total, 14 before the sample point and 2 after it. This too is a consideration that needs to be done by the programmer when picking the clock source for the MCU - otherwise it might be impossible to support all standardized baudrates with sufficient accuracy. Getting this right is not trivial and usually the most complicated part when writing a CAN driver.

Both the sample point and the baudrates are standardized mostly through CANopen (and then everyone follows that regardless of whether they use CANopen or not). From the CANopen CiA 301 standard (source CAN In Automation - the standard is free to download if you just register):

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Ideally you need to support all of these (and sometimes 100kbps), but the most commonly used are 125kbps to 1Mbps.

As mentioned in the quote from the post above, the easiest way to achieve the specified baudrate with correct bit sample point is usually to have 16tq, time quanta. One time quanta corresponds to the clock speed of the CAN controller. The various segments of a bit is specified by the CAN standard itself is sync segment, propagation segment, phase segment 1 and phase segment 2 (see this for examples). You need to tell the CAN controller how long each segment should be and that's also what gives you the baudrate.

The sample point location is given by the length in tq of everything before phase seg 2, divided by total tq. For example a common setup is sync seg=1tq, propagation seg=11tq, phase seg1=2tq, phase seg2=2tq = 16tq total. (1+11+2)/16 = 87.5%, which means ideal placement of the sample point.

This is where the clock prescalers of the MCU come in. Lets say you have a system clock of 8MHz and you wish to use 16tq per bit and bitrate 250kbps. The universal physics formula for anything-baudrate is frequency = 1/time.

You then need to run the CAN controller with clock/16 = 250kHz (or if you will, 1/clock * 16 = 1/bitrate), which gives 4MHz. The system clock of 8MHz therefore needs to be divided by 2.

The above is fairly universal for all CAN controllers. I've written CAN drivers for a lot of different controllers and how to set clock settings is most of the time similar. The most tricky part is always configuring the sample point.

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It's somewhat device dependant but the CAN bit time is actually divided in four segments. CAN FD and the newer are more complex but I don't know much other than they can switch speed after arbitration.

The prescaler is probably something in your controller to derive the quantum clock from your master clock. Typically the master clock is 10-16-20MHz for CAN 2.0.

The bit time is the actual nominal duration of the bit on the bus; bus baud rate is simply the inverse. Since CAN is more or less NRZ the baud rate equals the bit rate (each symbol on the bus only indicates one bit). Actually there's bit stuffing so the bus rate is slightly less than the baud rate. Typically you run at 500kbps,250kbps and so on down to maybe something like 20kbps (the transceiver often has a limit on the lower bitrate). Maximum for CAN 2.0 is 1Mbps but bus length become a problem.

The quantum clock is a multiple of the bit clock (in fact the bit clock physically doesn't exist in the circuit!). Typically it's 6-16 times the bitrate (both the standard and the datasheet limit this).

Each segment in a bit time is a multiple of the quanta time: 1 for resync, and variable for the others. Different controllers have different way to group the times and the datasheets have plenty of diagrams to show how a bit time is made up with their part.

It's often a trial-and-error process to determine the correct values but often there are tables in the datasheet containing the values for common master clocks and bitrates.

TLDR: you actually program only the quanta time and the segment durations, the bit rate comes out from that. The prescaler is to slow down the master clock to something countable as quanta.

By the way: 99% of the serial ports (RS232-485 etc) works exactly in the same time: the bit rate is actually usually 1/16 of the serial port clock, to allow for slight drifting in the clocks. CAN does exactly the same but it's more tunable and has the resync jump available to allow larger drifts. Also protocols running over CAN (like OBD or CANopen) sometime mandate some variations (like sampling at 75 or 80% or single vs triple sampling), check the relevant specification to ensure interoperability

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  • \$\begingroup\$ Sample point at 87.5% as per CANopen is pretty much de facto standard everywhere, unless you are using some highly exotic protocol. \$\endgroup\$
    – Lundin
    Commented Oct 7, 2021 at 10:09
  • \$\begingroup\$ OBD is 80%. I highly doubt that would make a difference in practice. \$\endgroup\$ Commented Oct 8, 2021 at 11:38
  • \$\begingroup\$ 80% vs 87.5% won't make much of a practical difference, though it also depends on baudrate. I'm guessing OBD always uses one single baudrate like 250kbps? I've used CAN controllers which would not work at certain baudrates if you place the sample point at say 40%-50% or such. \$\endgroup\$
    – Lundin
    Commented Oct 8, 2021 at 11:41
  • \$\begingroup\$ Synchronization starts with SOF changes for recessive to dominant . How devices on the bus know if they are in synch with each bit sent unless they take many samples during the bit time? \$\endgroup\$
    – Mission YE
    Commented Oct 18, 2021 at 20:08
  • \$\begingroup\$ @MissionYE this is called an 'hard resynchronization', on SOF the quanta counter is reset to resynchronization segment; after that is follows the clock until end of frame. It works exactly like a serial port (there is an interframe pause instead of 'stop bits'). Also there are allowances for slight differences in clock with the skip segment. Read the spec, it's public and free \$\endgroup\$ Commented Oct 19, 2021 at 7:18

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