I designed a board recently that accidentally had an incorrect pinout on the RJ45 jack for Ethernet. Instead of following TIA568, I instead routed it straight-through:
Oh well, simple mistake, resolvable with a custom patch cable. But just for fun, I tried using a normal patch cable and connected it to a switch... And got a link?? Only a 100BASE-TX link instead of the gigabit link that I eventually wanted, but still, I was expecting no link at all with this messed up pinout!
I've seen a few features that can resolve typical cabling issues, such as:
- Auto polarity inversion
- Auto MDI/MDI-X
- this can swap pairs A/B and C/D independently, but usually no other swaps.
- Autonegotiation (mostly for the PHYs though)
However, my situation is that the pair on pins 1 and 2 is routed properly; that's one half of the 100BASE-TX connection. But then, the other half that should be on pins 3 and 6 is actually on pins 3 and 4. Since this results in the signal being split across pairs on the receiving side, I don't think that polarity inversion or auto-crossover could fix this.
And yet, despite this interface being clearly wrong, I still got a 100BASE-TX link! My question is, how? What mechanism allows for this incorrect pinout to wind up working somehow, albeit in a limited fashion? This has occurred across multiple models of PHY on my board and multiple test devices (switches, Ethernet cards, Ethernet adapters) so it doesn't seem to be an isolated event either.
Full schematic from the PHY (a TI DP83867) to the problem port via the transformer:
