Unexpected Loss In Signal Integrity

Question

For a project I'm working on, I wanted to clone this e-paper driver board and eventually integrate it into my project's board. Here's a part of the schematic:

However, with my custom prototype clone that I did with EasyEDA, I lose almost all of my signal when I connect the e-paper display over an extender flex cable. The signal that I'm focusing on for testing is the GDRH signal which turns on the mosfet Q1. The image below shows the original board by Good Display that I'm trying to clone, connected to the e-paper display.

Here's how the GDRH signal looks like on the original Good Display board, measured directly at Q1:

It looks the same with or without the extender cable. The on-phase is 1.5us wide and the rise and fall time is roughly 30ns. Here's my clone board connected. Yes it's very crude and full of engineering sins because I'm a beginner:

Now here's the signal without the extender cable:

Even though the display is connected directly to the board, the signal has already deteriorated alot. The on-phase is much shorter and the rise and fall times are much longer. In this configuration the display still works fine. This is the signal with the extender cable attached:

There's barely anything left. The on-time is so short, that the image quality of the display is significantly degraded. The signal looks like this even when measured on the display side.

As a beginner I have no idea what went wrong. My best guess is that the connector I used in my design, which isn't the same model as the one used in the original board, introduces more resistance beween the extender cable and the board and this creates an RC circuit. But can that really be? I have no reason to assume that this connector is worse than the original. The cable fits tightly and when pressing on the cable and connector it doesn't change the signal.

I also can't imagine that it's the mosfet, but for reference here's the one used in the original and here's the one I used. I also didn't add a ground plane because I didn't know how to do it at that time. Here's my PCB layout. The line in question is highlighted and was auto-routed.

Keep in mind that the particular line I measured for testing is only connected to the connector, the gate of the Q1 mosfet and the R2 1MΩ pull-down resistor (well, and my probe). I double checked my design to make sure I didn't accidentally connect another component, and I didn't. Any explanation for why the signal is so much worse on my board?

Update:

Here's my schematic:

Answer 1

I also didn't add a ground plane because I didn't know how to do it at that time.

That's the primary source of the problem.

Even though the display is connected directly to the board, the signal has already deteriorated a lot.

Something couples to the gate signal, obliterating it.

Here's how the physical GDRH circuit may look, with various parasitic impedances and interference sources:

^{simulate this circuit – Schematic created using CircuitLab}

Here's what can corrupt the GDRH signal:

• The inductive loop Lgdrh couples with other inductive loops that are concentric, Lgdrh_coupled.

• The parasitic capacitance Cgc couples to one or more nearby node voltages Vi1. This is probably negligible on your board, though.

• The gate capacitance Cgd couples the drain to gate. If the drain swings fast, there'll be lot of current flowing through that capacitance.

• There is an impedance Rvcc+Lvcc in the supply circuit for the E-Paper display's logic. That logic drives the GDRH signal through a driver consisting of MH and ML. Those two devices are on the die of the driver chip on the display glass.

• The Ii2 source, which can be due to various layout blunders, corrupts the GDRH_VCC supply voltage such that it collapses as soon as Q1 starts switching.

  A likely culprit for that would be ground bounce seen by the display due to high currents flowing indiscriminately through fairly high ground trace impedances on your board.

  This seems to be corroborated by the fact that extending the cable makes things worse. There must be large currents flowing through that cable where they shouldn't be flowing, due to inadequate layout.

VDD or VDDIO are used as GDRH_VCC probably.

I wouldn't be surprised if ground bounce or GDRH_VCC collapse was a large contributor to your problem. It's easy to check: measure the VDD and VDDIO supply voltages right on the F-F (female-to-female) adapter board when the extender is in use. Make sure the entire circuit is floating from mains ground (e.g. powered with a bench supply), and connect the probe directly across VDD/VDDIO and GND points on the F-F adapter.

The DESPI-C73 board has a poor layout around Q1 and Q2, and is not a great example to follow, but it probably has a ground plane and less circuitous routing of most signals, so there's much less corruption.

A good layout will do better EMC-wise than the DESPI-C73 board, which seems to have been designed with esthetics in mind (components laid out in rows) more than functionality.

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The layout is probably pushing quite a bit of loop current through the three GND lines on the flex cable. That's because the impedance that connects those three lines is too high, and high currents flow though it. This can easily corrupt the logic signals.

A ground impedance would be just as bad as the impedance on the "VCC" side of GDRH_VCC:

^{simulate this circuit}

When Rvcc1,Lvcc1 and Rvcc2,Lvcc2 are much lower than Rvcc3,Lvcc3 and Rvcc4,Lvcc4, the currents circulate on the board and there are no large voltage drops either on-board or on the cable due to those currents.

As soon as those currents are pushed out to the flex cable due to inadequate layout, the driver IC in the display will have a corrupted ground, and thus corrupted supply voltage, and won't be able to operate properly and/or drive the GDRH signal.