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I am currently attempting to construct an high side driver of Mosfet. There is scheme: enter image description here

When there is no signal on IN pin: HO = CS = Vs = 8.3 V. When I send pulsing signal ( pwm like ) with 4 V amplitude I expect to see 11.4 V on HO and LOAD and 22 V on VB but it is not happens. There is still 8.3 V on HO, CS and Vs pins.

It seems like MOSFET can't open because Vgs = HO - CS = 0. So, after that I connect Vs to ground and get Vs = CS = HO = 0 v while there is no signal on IN. But still nothing happens if send signal on IN.

Finally I get expected 11.0 V on LOAD and 21.0 V on VB using this method: disconnect Vs from GND same time high level signal on IN.

So, what I miss? How can I get Vcc on LOAD by using only IN pin? Is there is wrong scheme? I get it from datasheet. Explain me please.

Edit: After modification of scheme: enter image description here

I get expected 22 V on Vb and 11 V on Vs when 4 V on In. Is it correct scheme?

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  • \$\begingroup\$ What power supply voltage are you using and what current can it supply? \$\endgroup\$
    – Andy aka
    Commented May 30, 2015 at 17:27
  • \$\begingroup\$ I power it from 3 LiPo 3.7 v battery. I think it can supply current up to 2 A. \$\endgroup\$
    – user3583807
    Commented May 30, 2015 at 17:41

3 Answers 3

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Do you remember to run switching frequently? If you only switch once, the boost capacitor will discharge and there will not be enough voltage to hold the gate charged.

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  • \$\begingroup\$ Yes, I use it in PWM driven application. \$\endgroup\$
    – user3583807
    Commented May 30, 2015 at 18:25
  • \$\begingroup\$ Do you have low side either? The source must go to GND potential. \$\endgroup\$
    – user76844
    Commented May 30, 2015 at 18:27
  • \$\begingroup\$ I mean, with the pull down resistor the capacitor charges slowly, you have to really short this node to GND. \$\endgroup\$
    – user76844
    Commented May 30, 2015 at 18:30
  • \$\begingroup\$ Did you mean that first scheme not will work without low side driver? \$\endgroup\$
    – user3583807
    Commented May 30, 2015 at 18:35
  • \$\begingroup\$ First- definitely, second- depends on resistor, but i bet you put like 1k or 10k,so the second one too. \$\endgroup\$
    – user76844
    Commented May 30, 2015 at 18:36
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The second schematic (with load resistor) is better, as the load resistor is important for your high side driver to work.

During off state, the 100nF capacitor is charged, from current flowing through the diode and the load resistor.

As you turn on, the voltage at source rises, but so does the potential at the upper side of your capacitor and the high side driver is still able to further charge the gate capacitance until the FET is fully turn on.

If you want to use this circuit to create pulses you are fine, as on each pulse the 100nF capacitor will be recharged. You can't use it to turn your FET on for a long time, as the 100nF capacitor will be finally drained (gate current leakage).

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  • \$\begingroup\$ Great explanation! But I'm still confused by what did not work the first scheme! It is not workable or I did something wrong? \$\endgroup\$
    – user3583807
    Commented May 30, 2015 at 18:23
  • \$\begingroup\$ You need a load (the resistor in the second schematic) to charge the 100nF capacitor to Vcc. \$\endgroup\$
    – Roland Mieslinger
    Commented May 30, 2015 at 20:19
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As well as the comments on the necessity of a low-side driver (or low-value load) and some duty cycle that it not 100% high for the bootstrap to work properly, this circuit will never work with a supply from a LiPo 3.7V battery.

In order to protect the MOSFETs from going into linear mode the IR2125 chip shuts down with less 9-10V supply. Many MOSFETs are specified with Vgs = 10V. This is called undervoltage lockout (UVLO) and is an important feature of MOSFET drivers.

enter image description here

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