What is the effect? Is there any article or lecture note for me on this?
and I would like one more question what is the effect of load resistance has on inductor current on DC-DC converter?
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1\$\begingroup\$ There is a lot of information available on the web for both the Buck Converter and Boost Converter. As well as the links provided take a look at application notes from the many IC manufacturers that provide buck and boost controllers. \$\endgroup\$– Warren HillCommented Sep 12, 2015 at 15:28
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2 Answers
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The MIT OCW site for their power electronics class is a decent resource. Lecture 5 contains the material on DC-DC converters. It first derives the basic DC analysis, then proceeds to derive voltage and current ripple.
In general, the ripple current / voltage will decrease as switching frequency goes up as their is less time for the inductor/capacitor to charge/discharge between cycles, creating ripple.
You can see this from the inductor current ripple equation in a buck converter.
$$\Delta L = \frac{V_{in} D (1-D) T }{2 L} $$
Where \$T\$ is the period of the switching frequency.
Changing load resistance will affect the average inductor current. If we stay in continuous conduction mode (CCM), that is the inductor current never reaches 0, then the output voltage is \$V_{out} = D V_{in}\$. The average current flowing through the inductor is then \$I_L = \frac{DV_{in}}{R_{load}}\$. You can see that as we decrease the load resistance, more current will flow through the inductor.
One last point on load resistance is the case of when we have very large load resistance. Consider the case of an open circuit load. This means no current flows out of the buck converter, i.e. we have zero output current. Under continuous conduction mode, we could assume symmetric current ripple through the inductor. In this case, this would mean we have reverse flow through the inductor while the high side switch is off.
Now depending on your implementation of the buck converter, this could mean 1 of 2 things. If you have a asynchronous buck converter, i.e. MOSFET for high side, diode for low side, the converter enters discontinuous conduction mode because the diode will not allow reverse flow. The standard relation of \$V_o = D V_i\$ will no longer hold. If you implement a synchronous buck converter, i.e. 2 MOSFETS, we still have continuous conduction mode because the body diodes of the FETs allow reverse conduction. The standard input-output equations will hold.
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Speaking very generally, for a fixed inductance increasing the switching frequency will decrease the inductor ripple current and usually the output voltage ripple. It will increase switching losses and decrease efficiency.
If you increase switching frequency and decrease inductance it can lead to a smaller overall design though potentially with even higher losses due to inductor core loss. Output ripple may or may not decrease depending on the frequency and characteristics of the output capacitors.
The effect of increasing load resistance is as follows:
At very high resistance the converter MAY be operating in PFM mode or discontinuous current mode. IF that's the case then decreasing the resistance will eventually bring the converter into continuous mode where the inductor current never reaches zero. At that point further decreases in load resistance will increase the average inductor current (which will then equal the output current in a buck and the input current in a boost.)
As the comment says above there's lots of information on the web, and I think it's beyond the scope of this forum to give a full answer on the complexities of both topologies.
