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Could someone help me understand whether it is correct to assume that all ARM cores on a device such as a smart phone must be closely located on die for faster communications ? Otherwise would the device take a performance hit if the cores were located far apart ? Are all ARM embedded cores on die linked (via some control integrated circuit path) to one another ? How can a secondary such as core1 or core2 etc be configured so that it receives ALL and every IO/CPU data/instructions as though it were the main core0 which is made active by default on device power on or reset ?

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  • \$\begingroup\$ Please ask ONE question per question. \$\endgroup\$ – Wouter van Ooijen Nov 8 '15 at 8:32
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"ARM cores on a device such as a smart phone must be closely located on die for faster communications"

No, that is not needed, because sometimes that fast communication is not needed. One core could be part of the radio or gps subsystem, which doen't need to communicatie fast with the main core.

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  • \$\begingroup\$ I agree, but this is different from what is generally meant by multi-core as in the title, isn't it? \$\endgroup\$ – jippie Nov 8 '15 at 9:52
  • \$\begingroup\$ That's caused by Victors sloppy formulating. "all ARM cores on a device" includes my interpretation, "ARM Multi Cores on SoC's" is dubious due to the 's. "Multiple ARM Cores on a SoC" would definitely point to your interpretation. \$\endgroup\$ – Wouter van Ooijen Nov 8 '15 at 11:04

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