How is NAND flash going to die when overheating

Question

If I have a NAND flash which is say 70°C rated, what is going to happen to that NAND flash when I heat it to 80°C or 100°C?

I'm thinking of a scenario when the 70°C rated sample actually starts producing errors at 71°C and I'm not looking at a sample which will have no problems above 100°C.

My current assumptions are that it can either the logic be corrupted (like in RAM and CPU) or the actual NAND bits can flip more often?

I'm basically trying to figure out a high level testing methodology that can run from Linux.

Thanks!

Answer 1

A few things I can think of.

• Chance for memory to be erased (poor data retention). In flash memory, charge stored in the insulating gate of a MOSFET acts as the memory element. Under high temperature this charge leaks more quickly. From ti paper: "with sufficient thermal activation, all bits could lose their charge". Also from the same paper, gate oxide damage.
• Trapped charges injected into the oxide due to the high temperature will build up. Over time this will add up create a voltage offset on the gate (making FET more leaky). This could create a situation where the FET is permanently on (unless the gate is driven sufficiently low) if enough charge builds up.
• Shorter lifespan in general. Heat causes a lot of processes to speed up exponentially: (Arrhenius law). Thermal expansion can cause peeling of metal vias from their respective layers or a host of other problems.
• Possible complete failure due to thermal runaway (unrecoverable).
• Higher leakage overall. More power burned. From pdf on leakage, in 65nm process: leakage at 0C is ~10x less than 40C, which is ~10x less than 100C.
• The circuit will run slower than expected, due to more collisions of free carriers.

Answer 2

You will not see anything because they are masked by the front end. When you get bit errors, you just skip to a new page. You will just notice the device get smaller, faster.

If you could see them, the failure that you will mostly likely see is soft errors due to noise, but it is different than you think. As the temperature increases, the densities of states expands and thresholds move due to drain-side charge sharing that shortens the effective channel length. This causes problems in clocked systems that gives read errors, but this is not due to the FLASH transistors, but the charge amplifiers.

There are two other scenarios that come to mind for hard errors.

1) You get more charge getting "stuck" in the oxide during injection due to these increased energy levels that would generally not trap the charge. My answer on simulating floating gates has a band diagram for this injection, and just imagine that electron get trapped in the barrier. (a note, this is the behavior that causes things to fail after millions of writes. Increasing the temperature just speeds up the process)

2) The extra energy due to heat will cause a hole to get enough energy to "jump" through the oxide. This makes a literal crater in the oxide. I could create this behavior in the lab, but I had gate control of actual device and a temperature chamber.