Problem: unexplained current draw on non-inverting input when voltage on non-inverting input is above the inverting input.
Background: I have been playing around with an RC timing circuit from pg. 24 of "The Art of Electronics" (Horowitz and Hill, 2015).
The idea is to charge a capacitor, and then slowly drain it using a resistor. A comparator op-amp is comparing the voltage on the capacitor against a reference voltage, and turning on an LED while the capacitor voltage is above the reference.
simulate this circuit – Schematic created using CircuitLab
I breadboarded up the circuit using a 100 uF capacitor and 1 Mohm resitor. I used a TLV2462CP op amp (because that's what I had in my box), and a LM4040-based precision voltage reference (Adafruit P/N: 2200) in place of the voltage divider.
My plan was to experiment with RC times, but I found the LED was shutting off far too early. When I probed the circuit at the testpoints above, I got this strange behavior. Notice the kink in V_CAP near V_REF. This kink moves upwards if I use V_REF = 4.096 instead.
I'm clearly getting some sort of increased bias current while V_CAP > V_REF, but why? The TLV2462CD is not a comparator, but this behavior is still strange.
Solution: I took suggestions 1 and 2 of @dannyf. When the capacitor is fully charged (i.e. 5 V), the discharge current across R2 is 5 uA. According to the datasheet, the worst-case bias current for the op-amp should only be 25 nA.
However, I decided to add a buffer op amp to the capacitor (luckily, the TLV2462CD is a dual op amp!), and the circuit behavior is now as expected.