I have been trying to figure this out, kinda a amateur question actually! Looking at the above circuit diagram am wondering why there is no voltage drop across the resistor R1? A part of voltage should be dropped out by the R1 isn't it?
But the simulation in Proteus shows that the Voltage across both R1 and R2 remains the same. Can anyone help me out on this one please?
I’m going to try to combine the other two answers and bring it down in level just a notch.
All of this, as Innacio noted, are based on a simulation of ideal components. In real life, the results are slightly different.
First, because the voltage is DC, the capacitor will fully charge and effectively become an open circuit. Just pretend it isn’t there. The volt meters are infinite impedance and so draw zero current.
Now look at Ohm’s law: voltage = current x resistance. Because the current draw is zero, the voltage drop over each resistor is also zero. Thus, you see 9 volts at both nodes.
In real life, this will be different, though maybe not enough to see. The cap will have leakage current, effectively becoming another resistor. However, the effective resistance may be large enough to dwarf the actual resistors. Also, the volt meters will draw some current, but again, it may be so small that it has little effect.
The capacitor becomes fully charged. The current thus is zero, and the voltage drop across both resistors is zero.
Did you not run a .DC sim?
If there is no volt drop across a resistor, it means that there is zero current flowing or the resistance is zero ohms. This is ohms law i.e. V = IR. More checks: -
If a capacitor has 9 volts across it and it is fed from a 9 volt battery via a resistor (or two) then the formula for current is C.dv/dt
(where dv/dt is the rate at which the capacitor voltage is changing with time).
Given that the capacitor voltage is constant at 9 volts, there can be no current through the capacitor.
This is in agreement with the resistor analysis and you can only really conclude that there is zero current flowing.
There is a voltage drop, but it is insignificant compared to the voltage drop across the capacitor due to its leakage current. And with ideal models such as those available in most simulators there will be no leakage current and no meter current and hence no drop across the resistor.
