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The Bode plot of the loop is as shown here:

Bode Plots

The transient step response looks like this:

Transient Response

The block diagram looks something like this - basically a single stage op-amp (OPAMP in figure) with high gain (cascode structure) biasing a FET (M1) such that its drain is equal to Vbias.

A small signal step is applied at I1 Ibias and transient current through FET M1's drain is observed.

Block Diagram

Am I missing something here?

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  • \$\begingroup\$ What kind of system are we dealing with? Is it completely linear over the operating range? \$\endgroup\$
    – John D
    Commented Sep 12, 2019 at 20:30
  • \$\begingroup\$ It’s a second order system with an opamp in it. Used some miller compensation to split poles apart. When a step current is applied at a point in the loop, I’m observing an overshoot inspite of PM being close to 90 degrees \$\endgroup\$
    – SBO
    Commented Sep 12, 2019 at 21:06
  • \$\begingroup\$ Show your circuit? It certainly seems like it should settle nicely. \$\endgroup\$
    – TimWescott
    Commented Sep 12, 2019 at 21:58
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    \$\begingroup\$ It doesn't look to me like your loop gain measurement technique is accounting for the FET's gain. \$\endgroup\$
    – Andy aka
    Commented Sep 13, 2019 at 7:06
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    \$\begingroup\$ @MAM You are correct, that is the problem precisely. The loop must be broken at a point where there is no (appreciable) current flow. Since the amp drives the capacitive load of the FET gate (augmented courtesy of Miller), its output is not where you can break the loop easily. \$\endgroup\$
    – polwel
    Commented Mar 21, 2022 at 18:16

2 Answers 2

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This faulty analysis is commonly because of incorrect placement of the loop 'break'. When you break the loop at the point shown, the Miller effect of the FET is not analysed correctly because the FET's gate is driven from a voltage source. Thus the loading it presents to the opamps output is not correctly modeled.

If the FET is large, this could be significant; conversely the '+' input of the opamp could be significantly less capacitance than from the drain of the FET and so is a suitable place to break the loop.

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I suspect you're looking at an artifact of the propagation delay through the op amp. The output overshoots because the effects of the negative feedback aren't felt until a finite time period after the response to the step.

If there's a propagation delay of N ns, the step response won't produce an effect on the output until T=N, and thus the feedback won't produce an effect until T=2N.

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  • 1
    \$\begingroup\$ Surely, loop analysis characterizes precisely all of that..? \$\endgroup\$
    – MAM
    Commented Sep 13, 2019 at 14:38
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    \$\begingroup\$ @AdilMalik - No, loop analysis essentially looks at the response to a CW sine wave after all perturbations have died out. You are looking at a step response, where the effects of the higher-frequency non-linearities are still in force. \$\endgroup\$
    – WhatRoughBeast
    Commented Sep 13, 2019 at 17:32
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    \$\begingroup\$ Yes ofcourse. I agree that frequency response is done on a linearised model. However, this is not what this answer is about and what I am questioning. Christobol refers to delay thru the opamp which should be characterised in the linear model etc? \$\endgroup\$
    – MAM
    Commented Sep 13, 2019 at 18:28
  • \$\begingroup\$ Bode Analyses includes all delay effects in a linear system. Of course the loop has to be broken in a suitable location, or appropriate corrections/calculations applied. \$\endgroup\$
    – jp314
    Commented Aug 19, 2022 at 1:32

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