Using QSFP28 Module at Lower Lane Rate

Question

I have an application that requires optical transmission of 4x16 Gbps SERDES lanes over fiber. A QSFP28 module for 100G ethernet seems like a great commercial solution--it can take the four lanes and combine them over a single fiber channel. The only hitch is that all of the QSFP28 modules I can find are only characterized over a narrow electrical lane rate, about 25-27 Gbps.

Here's an example from FS, but it's a similar story for all vendors I've checked: https://www.fs.com/products/75309.html

I understand why the datasheet recommended range is so limited, since they are designed for a singular networking application. However, my gut also says that a lower but not-too-low lane rate like 16 Gbps would be okay for the internal SERDES transceivers. It would also enable the modules to be used in 40G/4x10G applications, so I'm wondering if there are any resources that would serve as evidence to this point.

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Additional Research

I accepted Joren's answer since it showed quite clearly that the limitations of the CDR/retiming functionality of QSFP28 modules would be the foremost barrier. I also did a little research that I want to share here. There is a workaround provided in the QSFP28 memory map. See the snippet below from SFF-8636: Management Interface for 4-lane Modules and Cables, which shows that it is possible to disable retiming functionality. This presumably comes at the expense of signal integrity at the receiving end and consequent maximum link length.

I'll probably run some tests, and also take advice to look at alternate fiber specifications.

Answer 1

The problem is often in clock-recovery circuits. The CDR chips used in these kinds of modules have PLLs/recovery loops with limited locking rates. An example (but made for QFSP40) is the Semtech GN2405A. As a result, you can only use them with symbol rates that match them. Sometimes, as is the case with the Semtech IC I linked to, you can have modules that can lock to lower rates too, but again only fixed windows. Sometimes you can also disable the retiming circuits of such a chip. However, all of this stuff is controlled by the microcontroller integrated in the QSFP module, and is not something you have access to as user.

Answer 2

If you aren't running at a compatible line rate, you'll need to disable the transceiver CDR circuitry. I have had to do this before when running at rates other than 25G, including at 10G. This can be done via writing to a specific MSA register via the I2C interface. The register is number 98, with the lower nibble controlling the CDR on the four RX channels, and the upper nibble controlling the CDR on the four TX channels. So try writing 0 to this register and see what happens. I will note that not all modules have CDRs, and not all modules implement this register correctly.