I've been building my own CPU from low level chips, using the 74LS283 adder. And I've been wondering about how to set the overflow flag. Finally I seem to have grasped that the overflow flag is the carry-in of the MSB xor-ed with carry-out of the MSB. See also https://stackoverflow.com/questions/29330787/signed-overflow-why-carry-in-and-carry-out-of-msb-should-match. But I wonder how I could even know the carry-in of the MSB when I use the 74LS283 adders?
I suppose with the '181 ALU, there are signals !P and !G. From the datasheet:
P (Carry Propagate) and G (Carry Generate). In the ADD mode, P indicates that F (result) is 15 or more, while G indicates that F is 16 or more. In the SUBTRACT mode, P indicates that F is zero or less, while G indicates that F is less than zero. P and G are not affected by carry in.
this sounds like it might come close, but if I interpret the 4-bit numbers as two's-complement signed numbers, then 15 is already -1. In subtract mode this might work. But what about signed addition overflow?
There is another related question here: How to determine if a Carry Look Ahead Adder Overflows but it seems to have only allusions and comments that speak about precisely the problem that the carry-in to the MSB is hidden inside the package.