The concept of a load cap to a DCDC converter has two factors. Forward loss + bulk storage and effects on feedback error correction. The tradeoffs depend on load range , overshoot and ripple tolerances. The cap choices affect ESR vs frequency, losses vs size, quality and ESR*C time constant.
The ESR*C=tau determines the slew rate of voltage by the current it can handle such that the output is dV/dt= I * (1/C + ESR) = (1+ESR * C)/C. Low ESR e-caps have a tau=<10 us while ceramic may be << 1us but due to dielectric constant k will be smaller in C for the same size package so both ceramic and e-caps are usually chosen unless you choose many ceramic caps in parallel.
The other concept is that the bandwidth of voltage feedback for error correction is also determined by tau and this can introduce a phase shift which reduces phase margin in the loop, so partial derivative or slope compensation is required to restore stability in the loop.
The 3rd concept is the efficiency of storage and losses in ESR during loads which draw from the cap as a temporary storage device while the DCDC converter tries to charge up the caps and supply the load at the same time, so that the voltage error is minimal when then is a step load added or removed and the energy in the cap is sufficient to Buffer the voltage with a current swing so that the DCDC driver does not under or over charge the capacitor due to latency or under/over estimating the demand current and result in more error from amplifying the + or - error in bigger than necessary correction in the opposite direction.
So ultimately the feedback loop gain Kd, Kp must be examined and provide some tradeoff of output voltage ripple in order to remain stable if the output caps are “inside the control loop” . Isolating the caps with a ferrite bead outside the loop must also examine the Q of this filter for no load when Q is the highest with any LCR series filter.
How to achieve all these tradeoffs is somewhat complex and different for every design, but understanding these tradeoffs is the beginning towards intelligent DCDC designs by examining then driving impedance to reactive components and the feedback with a shorted output or a near shorted output due to the ESR of the caps.
Review answers by Basso for details ( verbal kint )
Tantalum are less favourable but some more expensive types can meet the requirements.
alum caps rated for ripple current @ 120 Hz are unlikely to be low ESR types at 100kHz. These have tau>100 us typically and used as bulk line rectifier caps.