How to deal with local capacitors near MOSFET PWM driver backfeeding other capacitors?

Question

I'm designing a multi-channel low-side PWM driver board with eight channels. Each channel has a maximum current of 6A, with a maximum total of 20A at any point across the whole board. The input voltage can be anything from about 5V to 30V. The switching signals are independent per channel and are externally supplied. They may be up to around 15kHz - I've carefully simulated the switching behaviours of the MOSFETs and BJT drive circuitry to establish a sensible maximum spec.

The loads that are being driven are LED strips or bars. They may have a little local capacitance on them, but they're not inductive loads. Regardless, I've thrown a flyback diode in there just in case.

The main input voltage is used to power a couple of voltregs that are used for onboard logic and a 12V Vgate rail for driving the FETs. In the case where the input voltage is below about 13V, there's an option to bypass the regulator and either drive Vgate directly from the input voltage or supply a separate external Vgate input.

One thing I'm being careful to account for here is parasitic inductance and resistance in the PCB traces. I know that with high dV/dt and dI/dt it's something I'm going to want to watch out for.

Some of this background potentially isn't all that germane to the question, but I'm mentioning it just in case.

For obvious reasons, I've got capacitors near the input and close to the voltage regulators, as well as right up next to the FETs. I've selected a mix of electrolytic and MLCC capacitors, with the latter picked using Murata's SimSurfing tool to ensure that I'm getting the right effective capacitance, ESR, impedance, etc. across the operating frequency range, and to ensure that I'm (hopefully) not going to run into self-heating issues.

Here's a stripped down version of the schematic to give you a rough idea of what's going on:

^{simulate this circuit – Schematic created using CircuitLab}

The Lp and Rp prefixed parts are parasitics. For the capacitors these were largely taken from Murata's tool as mentioned above, although I omitted their parasitic inductances because they're in the picohenry range.

The part to the right is a simplified version of a single channel PWM driver, with some of the details of the BJT push-pull driver removed to keep things tidy. In reality there's some stuff in there to control slew rate to keep EMI down. That driver circuit is repeated 8 times in total. In my sims I've got a whole string of LEDs rather than just one.

A problem I'm noticing in simulation is that the capacitors local to the MOSFETs are discharging and back-feeding other capacitors on other channels when they switch on, and they're also occasionally charging the upstream capacitors near the power inputs. I've got two concerns here: a) it creates a bunch of extra ripple current on the caps, and b) it means I've got a bunch of AC currents flowing across the board instead of being kept nice and local to the MOSFETs like I intended.

There are three main thoughts I have here:

1. Maybe I don't have enough local capacitance with low enough ESR/impedance, and that's why this is happening? Although my concern here is that I'm struggling to find capacitors that meet the requirements. Do I just need a crapload (I believe that's the technical term) of MLCCs in parallel here?
2. Maybe this is a good use-case for a power inductor between the main supply and each PWM output? I'm not 100% sure whether this is a good idea, though, and I don't have strong intuition in this area.
3. Maybe I could solve this with an ideal diode between VIN and each PWM channel, to prevent currents flowing back out of the local area? In simulation this seems to work, but I don't know if it's really a good idea.

My primary concerns are stable power delivery to the load, not having the capacitors catch fire from self-heating, and EMI.

This design isn't going into a product, so it doesn't technically have to pass EMC, but it is operating around a bunch of ESP32s and other radio equipment so I'd prefer not to be blasting radiated emissions everywhere. I'm using an impedance controlled stackup and being careful about reference planes, and generally trying to follow good practices everywhere in this regard.

How should I tackle this? Am I thinking about it in the right way, or is there something I've missed? Am I overthinking it? Any general thoughts or suggestions on how to design around this kind of thing?

Answer 1

To keep the circulating currents in local loops, add some inductance between the channel's capacitor bank's positive end and the supply, to increase AC impedance. Basically, you need to explicitly control those currents.

As far as simulation of such a system goes: you need an EM simulator to convert the PCB layout to parasitic lumped components that can then be simulated. Your approximate "PCB" parasitic are probably not representative of the performance of the actual PCB. There typically are multiple elements between nodes, and multiple time constants as well. There also will be some inductive coupling between various loops, so the parasitics will be not only resistances, inductances and capacitances, but also some linked inductors.

It's commendable that you're simulating this circuit so carefully, but this is a case of "garbage in, garbage out": the actual PCB layout won't behave anywhere near as simple as your parasitics imply. When you need simulation at such a level of detail, it starts to cost some money in software tools.