# RF high power amp bias scheme

I am using the TGA2237-SM for the TX side in a front end design. I am trying to figure out an analog method for doing the bias up and bias down procedures.

Bias up

1. Set gate to Vg=-5V
2. Increase Vg till Id=360mA (drain current), Vg~-2.6V
3. Apply RF

Bias down

1. Turn off RF
2. Decrease Vg to -5V
3. Turn off supplies

I was thinking of using a current sense amplifier similar to the LT6106, where my load would be the drain of my RF amp and the Vout of the LT6106 would be the gate of the RF amp. See image below.

I need the Vout to start at a voltage and then increase based on the load current increase. This sort of analog design is not my wheelhouse, but I feel like this should be easy, but something is eluding me.

• So what exactly is your question? One thing I can confirm reading your goal and the circuit proposed is that this configuration exhibit a positive feedback. The more current your RF draw the more bias your RF stage will receive, making it increase until saturation and possibly catastrophic consequences. You need to reverse the input polarity such that when RF current increase the bias go low. the rest consist in balancing the (then negative) feedback loop such that it feed your desired values. Commented Apr 27, 2022 at 16:08
• Please mention the period required for your circuit to go through the Bias-Up and Bias-Down procedure. You need milliseconds or second order of magnitude ? Commented Apr 27, 2022 at 16:21
• Hello Fred, thank you very much for responding and I apologize for any lack of clarity. I need the bias procedure to happen as fast as possible (sorry for being vague). I was going to use some uC GPIO pins to adjust this bias, but I thought that I could probably do this in some analog fashion. My front end is going to RX for 99% of the time and TX just needs to turn on, transmit, and turn off. I was originally just going to set the gate to -5, turn on the bias supply, and have a GPIO set the gate directly to -2.6, but I thought that I should maybe monitor that drain current. Commented Apr 27, 2022 at 16:42
• Sure, drain current monitoring is certainly a good approach. Please tell how your control circuit will know when its time to transmit and receive. I certainly am able to come up with a simple solution for you. Commented Apr 27, 2022 at 16:53
• When it is time to TX or RX, I have a single CMOS signal being split, where one trace goes through a buffer and one through an inverter, and those signals are then feeding a load switch. the load switch is taking 5V from a power section and using that to power the RX and TX side. Commented Apr 27, 2022 at 16:59

Here is my proposed solution. Please revise and let me know if you have any concerns or point to details I may have forgotten.

• Thank you Fred, I will analyze this and comment again. Thank you so much for your time Commented Apr 28, 2022 at 13:59
• One factor that came to mind after a nigh of sleep: that circuit maintain a tight control on current consumption. If the input RF signal is AM, the circuit is fast enough to lower the bias as fast as some milliseconds, which can seriously impede in the quality of transmitted signal. Perhaps the reaction time should be slowed down to a period higher than the lowest transmitted input signal modulation period. IE: if you are transmitting an AM signal modulated with a frequency in the order of 20 hertz the circuit, as it is, will prevent such slow modulation. Your thoughts... Commented Apr 28, 2022 at 14:17
• I think perhaps that I was overthinking this. The Vg will not have any RF, so I am thinking I should just have Vg always sitting at -5V. My control signal will turn on 32V rail. That same control signal will be applied to an opamp voltage divider buffer that I can tune with potentiometer. The current consumption when the amp Vg is sitting at -5V should be minimal. This is for more R&D, so max power effiiciency is not required at this point. Commented Apr 28, 2022 at 14:33
• My board takes in +5V for power, which powers all RX components. That same +5V goes through a boost converter for the +32V, as well as a charge pump converter for the -5V for Vg. The PA is the only component that requries the +32V and the -5V. Vg always sitting at -5V, control signal enables the +32V boost, and also enables the voltage division of -5V to ~2.6V. I was originally thinking that I should dynamically divide this voltage, but actually, I should only have to do this one time to make sure I get the correct drain current. Commented Apr 28, 2022 at 14:37
• Correct me if I'm wrong but from the datasheet it is my understanding that IDQ is controlled by IG. If you set VG permanently to -5V how are you going to get some current consumption from IDQ ? another question: Does the TGA2237 draw current based on the RF input signal strength even when VG is down to -5V ? ( see page 12 "Bias Up Prodecure) Commented Apr 28, 2022 at 14:43

Fred, I was thinking of something like this. Not perfect, but very simple. I think my issue might be the R1 resistor. The R1 is the gate, so I guess I could assume High Z. The node between R2 and R3 would have the pot.

• That could be another approach but why the Opto-Coupler ? I think the third solution with the OpAmp is simpler to implement and will assure you of an exact -2.6V on VG anytime you trigger the Transmit status. See link above. Let me know if you have concerns about the realisation. Don't let yourself be scared with a couple of transistors. If you are ready to go with an OpAmp, I think that is the best solution. Commented Apr 28, 2022 at 16:02
• Third schematic with the OpAmp error. R16 should be 47 ohms, not 4.3k. Commented Apr 28, 2022 at 16:05
• Is it possible to get access to -6Volt instead of -5V ? ( for the OpAmp) Commented Apr 28, 2022 at 16:08
• Revised OpAmp Solution drive.google.com/file/d/19MS-GSpLOc493uflUg91MosatozpxqvA/… Commented Apr 28, 2022 at 16:29
• Fred, just wanted to send a quick thank you for talking me through this. Commented Apr 29, 2022 at 13:53