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We can do this:

  1. With AC coupling and biasing op-amp input.
  2. Summing using buffered resistor
  3. Using sum and difference inherited in OpAmp and sum signal with desirably created virtual ground

1 is good but I want DC coupled circuit. 2 is good but I my circuit have variable resistance and low summing resistor attenuate signal and use power. High resistor in the other hand create noise. 3 seems to be good but I don't know how to apply it in the circuit below.

schematic

simulate this circuit – Schematic created using CircuitLab

I've heard unity non inverting input is reference, I don't know why but if this is then input is shorted to reference and the only variable is reference then there is no way to use virtual ref on it, Then 3 is not implementable without summing. But the opamp must be able to sum two signal not the summing mention in 2. using buffered resistor. OpAmp designed to summ and difference but why I can not do that?

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    \$\begingroup\$ What output do you want for, say 0V input? What output do you want for 3V input? \$\endgroup\$ Jun 11 at 12:10
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    \$\begingroup\$ I ask because it is not clear what you are trying to achieve. Not knowing what you are trying to achieve means one does not know what would be or wouldn't be a solution. \$\endgroup\$ Jun 11 at 12:29
  • \$\begingroup\$ @MathKeepsMeBusy added to picture. \$\endgroup\$ Jun 11 at 12:30
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    \$\begingroup\$ What is really the circuit you want to design? \$\endgroup\$
    – Antonio51
    Jun 11 at 12:54
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    \$\begingroup\$ Then don't use something out of range. You're not listening: buffering means feeding directly to an active device which means that device cannot be out of range. You either live with the divider impedance or buffer with an active component that is in range. \$\endgroup\$
    – DKNguyen
    Jun 11 at 18:41

2 Answers 2

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Amplifying a signal around Ground with a single supply is a nice application for a JFET. As they have a negative turn on voltage, you can easily make an op-amp with a very large input offset voltage. The offset voltage will be roughly the pinch-off voltage of the JFET + 0.7 V.

When you wire it up as a voltage follower, it will add its offset to the input:

schematic

simulate this circuit – Schematic created using CircuitLab

enter image description here

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You want the 1.5V input mapped to 6V output, with gain 1.

First, we can mirror the input around the average of these two voltages, performing the mapping but with gain -1. The "mirror" - or simply the reference voltage is:

$$V_{ref1} = {1.5+6 \over 2}{\,\rm V} = 3.75{\,\rm V}.$$

The first stage is an inverting amplifier with gain -1 and 3.75V reference voltage.

The second stage should restore the overall gain to +1 by inverting the voltage again, this time around the midpoint

$$V_{ref2} = 6{\,\rm V}.$$

schematic

simulate this circuit – Schematic created using CircuitLab

With a relatively stable 12V supply, we can derive the reference voltages from the supply voltage using a resistive divider:

schematic

simulate this circuit

The R5, R6 and R7 resistors are 1% types from the E96 series.

The waveforms at IN, A and B/OUT look as follows:

The voltage waveforms in the circuit

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