I am using an MCU (SAMD21G), to communicate over SPI with an SD card and an AD7193. I have both the SD and the AD7193 on the same SPI bus, each having its own CS pin.

My concern is, when reading the AD7193 datasheet, what I understood was that the DOUT/RDY pin, which is the MISO, goes low or high depending on whether a conversion is done or not. My worry is that it will mess up the communication with the SD card when it is trying to communicate with the MCU, since they are sharing the same MISO pin. I'm not entirely sure if that would happen or if I misunderstood the datasheet.


3 Answers 3


Here is the description of the DOUT/*RDY pin from the datasheet:

Serial Data Output/Data Ready Output. DOUT/*RDY serves a dual purpose. It functions as a serial data output pin to access the output shift register of the ADC. The output shift register can contain data from any of the on-chip data or control registers. In addition, DOUT/*RDY operates as a data ready pin, going low to indicate the completion of a conversion. If the data is not read after the conversion, the pin goes high before the next update occurs. The DOUT/*RDY falling edge can be used as an interrupt to a processor, indicating that valid data is available. With an external serial clock, the data can be read using the DOUT/*RDY pin. With CS low, the data-/control-word information is placed on the DOUT/*RDY pin on the SCLK falling edge and is valid on the SCLK rising edge.

So the issue is that if a conversion is activated and completes, the pin will be pulled low (*RDY). Obviously, if this happens when talking to the SD card, you will get a bus fight. Basically, what this means is that you cannot use continuous conversion mode on the ADC as a conversion completion will pull down the pin. Also, when you start a conversion, you must not try to use the SD card until you've read the conversion result. Otherwise, the pin should only assert when *CS is asserted.

If this is not acceptable, you could add a buffer with tri-state output in series with the ADC's DOUT pin, Assuming the buffer's OE pin is active low, you can drive it in parallel with the ADC's CS signal. This will guarantee that the buffer's output is tri-stated unless CS is asserted.

  • \$\begingroup\$ Are you sure about this? The datasheet diagrams never show that DOUT/RDY will do anything if CS is high, so it indicates the bus can be shared. On the other hand, the datasheet is not explicitly saying the DOUT/RDY pin being in Hi-Z mode while CS is high. \$\endgroup\$
    – Justme
    Commented Sep 19, 2022 at 5:47

This is what I read.
Using the AD7193 data sheet from (https://www.analog.com/media/en/technical-documentation/data-sheets/AD7193.pdf),

On page 36:
Continuous Conversion Mode. Continuous conversion is the default power-up mode. The AD7193 converts continuously, and the RDY bit in the status register goes low each time a conversion is complete. If CS is low, the DOUT/RDY line also goes low when a conversion is completed.

The chart on page 11 describes the CS pin as:
"Chip Select Input. This is an active low logic input used to select the ADC. CS can be used to select the ADC in systems with more than one device on the serial bus....." .

Page 34 also has a similar description of using the CS pin where several components are connected to the serial bus. "CS is used to select a device. It can be used to decode the AD7193 in systems where several components are connected to the serial bus".

You can also look at the Timing Characteristic section. page 9, it does seem to show the DOUT/RDY signal going inactive/tristate with the CS pin going high.

The chart on page 8 lists the timing of T1 and T5 (as marked on the timing diagram), which are the delay times from where CS changes to where the active/inactive points of the DOUT/RDY signal begin. There may just be a 10nS delay on the DOUT/RDY pin after the CS returns high, (they call it "Bus relinquish time").

So it would seem that connecting other data devices on the same bus is a legitimate thing to do regardless of the operating mode.

While is is true that the data sheet does not literally say the pins are tri-stated, the only way the statement about having multiple devices on the same data bus could be acceptable would be to have those common pins tri-stated when the chip is unselected.

Of course if you still have doubts you could call the tech support at Analog Devices. The tech support link is at the bottom of the first page of the data sheet.


You can just disable AD7193 by raising the chip select signal of the MCU connected to it.It seems the reason why chip select is implemented. In this way, whenever the MCU is sending or receiving data, it only communicates with either the SD card or AD7193, only one at a time. The only thing you have to do is to have separate chip select wires from the MCU to SD card and AD7193.If your MCU has only one automatic CS pin, use two GPIO as CS signals to control them manually.


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