Altium footprint cutout slot to pad clearance rule

Question

The LS05-13B12R3 requires two slots be placed on the pads of the two primaries of the transformer. The SnapEDA footprint model uses rectangular polygon defined as cutouts for this purpose in the footprint. Doing it this way generates a lot of errors at DRC:

Clearance Constraint: (Collision < 0.2mm) Between Board Cutout (Multi-Layer)Region (0 hole(s)) Multi-Layer And Region (0 hole(s)) TOP
and
Short-Circuit Constraint: Between Board Cutout (Multi-Layer)Region (0 hole(s)) Multi-Layer And Pad PS2-4(-10.73mm,9.017mm) on Multi-Layer Location : [X, Y]

Questions are :

• How do I make a special rule to ignore those two cutouts ?
• Is there an easy way to make it a proper round slot ?

Answer 1

Last time I did this (different part, similar style), I used these rules:

First object: IsBoardCutoutRegion AND HasFootprint('PS_PBO-3C')
Second object: IsPad AND HasFootprint('PS_PBO-3C')
Clearance: -40 mils
Place at high precedence in the ruleset.

Possibly the slot could also be made by using a slotted pad, setting its net to the intersecting pad's net (if it's in the footprint, give them the same number) and setting it as unplated (and set the copper pad size to zero). You might have less freedom in pad shape though, depending.