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In the past I have designed a platform that used an Intel Tiger Lake (Gen 11) CPU and now I have a new project that uses the AMD R6000 series.

Different from Intel, the design of the DP++ feature requires a muxing circuit that chooses between DDC signals and AUX signals (depending on pin 13 in the DP connector).

Intel DP++ Design in Platform Guide:

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AMD DP++ Design in Platform Guide

enter image description here

Does this mean that in the AMD, the DPx_AUXP\N signals can be switched to DDC signals internally?
If yes, how is this switching performed? I didn't see that pin 13 (CAD or Config1 in AMD design) goes to the CPU. What am I missing here?

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  • \$\begingroup\$ It may just have an internal mux to the DDC/AUX blocks or the single block supports both. How the internal switching is performed is likely information internal to manufacturer and not relevant for making a product with it. \$\endgroup\$
    – Justme
    Commented Dec 27, 2022 at 17:34
  • \$\begingroup\$ @Justme , I understand, but for this mix to work it needs an enable signal from the DP++ connector. I couldn't find such connection in R6000 Platform Design Guide. \$\endgroup\$
    – Firas Abd El Gani
    Commented Dec 27, 2022 at 17:46

1 Answer 1

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After consulting with AMD support, I got the following answer:

  1. First, I should set the wanted DP port in SBIOS for DP++.

  2. Then APU use AUX channel protocol to check capability of display monitor, based on feedback to see if it is DP or not.

  3. If it is not DP monitor, then APU uses I2C-over-AUX to read EDID of monitor.

  4. HDMI will show something in extended registers. If not, it will be considered as DVI.

Note: AMD don’t use MUX to switch DDC and AUX signals like Intel.

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