For example in STM32 MCUs, the CAN pins are CAN RX and CAN TX. Therefore to transform it to CAN H and CAN L, we need to use external CAN tranceiver. What's the purpose of it? Wouldn't it be easier to connect CAN H and CAN L directly to MCU, without using CAN tranceiver at all?
While I don't know the particulars of designing and fabricating these respective circuits, my expectation is this:
CAN interfaces must handle relatively high currents (>100mA), which requires relatively large area transistors on the die. This isn't a problem in and of itself, but it's an inelegant solution: one corner of the die might have potentially quite high power dissipation, potentially affecting sensitive circuitry beside it. Sensitive elements include ADCs, voltage references, clock oscillators / PLLs, etc.
That said, there are examples of relatively sensitive and complex circuitry paired with power devices; protected MOSFETs are an example, integrating a temperature and current sensing circuit onboard an otherwise ordinary power transistor.
But there is one thing that you will have a much harder time accounting for: voltage. CAN terminals are rated over ±20V, well beyond the breakdown voltage of any ordinary CMOS logic processes.
Voltage still isn't a deal-breaker per se: there are relatively complex ICs with multiple voltage domains. Advanced DC, stepper and PMAC/BLDC motor controllers for example, either contain the controller, and gate drivers for external power transistors (typically the drive domain is rated 6 to 18V), or the transistors are integrated onboard as well (on-die or multi-chip co-packaged). Now, knowing which way they're build (again, not having designed these exact devices), isn't easy, but some are publicly known (by x-ray or destructive examination, or occasionally documented as such), and many we can reasonably suspect based on their design. ST's powerSTEP01 comes to mind: multi-pad packages like these are almost always characteristic of multiple dies. Most likely the peripheral pads are discrete power transistors. Whether they integrate control and drive on one chip (center), or have separate driver chip(s), isn't clear.
But what can be a deal-breaker, is using a multi-domain process, plus all the process optimization that is necessary to realize an MCU. The most difficult of which are high-density SRAM (and logic in general), DRAM if applicable, and analog circuitry (ADC, reference, amplifier or comparator, PLL, etc.). MCUs are quite complex these days, and that's a reflection of the decades of process optimization that has allowed such a diverse toolkit to be placed on one die.
And keep in mind, especially in anything faster (≥ 60MHz or so), and even in slower families these days -- "MCU process optimization" already includes multiple voltage domains, even if they're largely hidden from the end user! There aren't many pure-3.3V devices these days, I think; many (most, even?) use an internal low-voltage core for much of the CPU, RAM and peripherals, with only the IO pins still running at VCC. (Case in point: the AVR-DA family just barely mentions its internal voltage regulator, across a couple pages in the datasheet; it doesn't even need an external bypass capacitor, it's nearly invisible to the user!) So it's an even bigger ask to have not just two, but three or more, very different, voltage domains across a single chip, while still having effective digital and analog functionality in at least one of those domains.
Also not to mention, support features like ESD protection -- not mentioned, partly because it may be assumed as part of the voltage domain (typically using standard foundry structures, is my understanding), and because these things are tightly controlled IP that no one shares publicly. But do appreciate that, whereas a generic logic chip might be rated 1 or 2kV (HBM), an interface might be specified at 8/15kV (IEC 61000-4-2 contact/air discharge). And higher ratings, of course consume more die area.
(Emphasis on "might": I've seen RS-232 and 485 interfaces, for example, rated for merely 2kV ESD. I've seen others rated over 15kV. Always check the datasheet!)
Or that, due to the large size transistors required, or the higher voltage rating, the CAN interface might not be reusable for general-purpose configurable use (GPIO), at least not with the same speed (due to capacitance of those transistors).
And it still doesn't include every case, because isolated CANbus might be desired, and that's harder to do with the raw bus, than it is on a pair of logic-level signals. And logic-level signals mean the pins can be reused for other functions as needed (GPIOs).
So, while it might be possible, the barrier as always is economic: how much are you willing to pay -- as the manufacturer doing the painstaking optimization work, and ordering extra masks to produce the multi-domain chips; or as the potential customer, to whom these costs are passed on? If that cost is greater than the alternative, it's a no-go. There are many more limitations than purely physical ones; such a chip might be physically possible, but it must also be economically feasible to produce, and in enough demand that sales recoup those costs (or reasonably expected to sell, since we're talking things that might not exist in the market yet).
Similarly, we might ask about other common interfaces.
What about USB?
USB is commonly available. The pin I/O levels are comparable to most logic levels, and as long as the process can support differential comparators (or LVDS receivers, or something suitable for lower voltage or precision logic input thresholds), a Full Speed interface should be promising; and if adequate speed is available, High Speed as well. ESD ratings are not usually very strong, but USB requires shielded connectors, which provide some physical protection.
Ethernet?
I've seen more MACs than PHYs, but I have indeed seen integrated PHYs in MCUs. These have similar signal levels to RS-485 or CAN (i.e., 1 to 2V into a nominal-impedance transmission line), but thanks to line isolation and termination, and better-controlled drive strength, the high voltage and current ratings can mostly be avoided. The structure is still relatively large and powerful (a typical Ethernet PHY consumes a few hundred mA at 3.3V), and probably most manufacturers don't want to commit the space, and potential power consumption, if it's not always needed; hence the PHY-less strategy being more common.
High speed interfaces: PCIe, HDMI, etc.? Yes indeed; these are low level logic structures, made complicated by their high speed and complex coding (well, PCIe moreso), but there are many application processors which integrate them. A natural fit, after all, and in high demand for embedded computing applications; take any Raspberry Pi for example. Or cell phone, for that matter!
RS-232: I'm not aware of any examples. This is quite an old interface that's probably not worth supporting on-chip, even though it is quite a common use-case; at least for development and light industrial applications. You just don't get much bang for your buck; it's a slow interface. The ±15V (and up) operating range is the trick here; currents are quite modest.
RS-485: lumping this in with CAN, as the levels are quite similar (indeed, the earliest CAN devices were apparently based upon RS-485 drivers).
Gate drivers: I don't recall part numbers, but I believe Microchip had some PICs with particular focus on switched power applications, for example? PICs are rather simple MCUs, though, so this might not be very unexpected.
But again, these are largely my suppositions, or things I've picked up on over the years. Nothing to put too much confidence in. Consider this more of a jumping-off point for further research.
It would be terribly expensive to build a CAN PHY which can directly handle the electrical requirements of a CAN bus directly into a general purpose MCU. Same goes on for any other electrical interface, such as RS-485 or RS-232, Ethernet or whatever. Only some specialized MCUs could have direct CAN bus connection and they do exist. For example the STM32 can't work with 5V power supply required for CAN PHY driver.
It is far more easier to make the MCU more generic and only to have the CAN bus logical level controller, and have the 3.3V logic level connections to CAN PHY which provides the interface to physical wires with high power transistors and protection components, and make it compliant with differentially transmitting and receiving the 5V bus voltage levels.
The CAN transceiver needs some adaptability that the microprocessor may not be able to support. Depending on which CAN transceiver chip you choose, you can get additional control over:
And so on. I can buy a variety of transceivers that accomplish the functions above, which is all flexibility that would be lost if it was buried in the MCU.
The technology to put the CAN driver on the processor is possible but it is currently not cost effective. This is because of the current etc the bus requires. The silicon area needs to be much larger and robust to support this, much larger than that required for a processor.
There are several 3V3 CAN drivers available. This can be checked by searching for: '3V3 can drivers". They can be mixed on the CAN bus with both 5V and 3.3V systems. This capability saves an extra 5V power supply in some designs.
As far as the CAN bus it is a differential bus. Depending on the system the voltages will vary. It is the relationship of CAN H to CAN L that determines whether it is a 1 or Zero not the absolute voltage. CAN 0 is the dominate state which is used in arbitration and acknowledgement.
Also you may want to choose different types of CAN transceiver for different environments. Some CANTXRs are capable of coping with plus/minus 80V on the inputs (i.e. miss-wiring, sticking power onto the CANbus at say 50V, won't damage them). You pay extra for the tough ones, but it's better than having all the devices on the CANbus wrecked because someone wired an installation incorrectly and turned it on.
