This answer gives a good explanation of how to use a keypad matrix to minimize GPIO usage by scanning rows and columns to find a button press when an interrupt triggers. This scales very nicely for large arrays of buttons---but what about when the button count is small? For example, a 4-button matrix still requires 4 GPIOs (2x2), so you might as well wire each button to its own GPIO.
In our case, we would like to wire up a 5-button (up/down/left/right/ok) keypad.
Question:
- What is the minimum number of GPIOs that are required to wire up 5 push-buttons, and what would the circuit look like?
- Ideally without an add-on chip, but see below.
- Detecting simultaneous button presses is not necessary.
(A clever circuit without an addon-chip is preferred, as we are trying to minimize BOM cost. However, some kind of multiplexer chip shift-latch-thing or whatever would be acceptable as part of an answer if it's inexpensive (<$0.50 in qty >=100). I would like to avoid more expensive (but otherwise perfect) i2c scanning chips like this one, but I'm open to an i2c solution if the cost is low.)
FYI: We're using an ESP32-C6.