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Is fixed point multiplication/division still faster than floating point operations when a FPU is present? Is there any situations where this might change? For example under very heavy floating point calculations? Why have more than 1 FPU?

I am thinking specifically about the ARM platform Thumb/Thumb 2 instruction set or similar.

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Floating point is more complicated to implement in silicon than fixed point, so usually has more delay. However, every implementation is different, and there are various ways to trade off speed with the number of transistors used.

Your question can therefore only be answered for specific units by looking at their datasheets or running benchmarks. In general, fixed point multiplication and addition will probably be faster than floating point given a fixed point. FP division could possibly be faster because there might be fewer bits to divide. Divide algorithms are often per-bit loops.

Again, the only way to know for sure is to compare the specs or run benchmarks.

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    \$\begingroup\$ So i guess using a 16 bit fixed point will be a lot faster than a single precision float (32-bit)? As i do not need a very wide range. \$\endgroup\$ Commented Oct 12, 2013 at 13:59
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    \$\begingroup\$ @user: Yes, probably, assuming both are implemented with the same technology. \$\endgroup\$ Commented Oct 12, 2013 at 21:28

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