Altium says my labels are floating

Question

Been using Altium and multi sheet projects for a while. My latest project involves a lot of signals so I'm trying to keep things tidy using lots of labels, ports, busses.

So I have a bus for enable signals going from the microcontroller sheet, to the stuff that needs to be enabled. And the same for fault conditions, current senses and so on.

I have like 4 of the same for different busses. Now Altium keeps saying that all the NET labels on the port side are floating. Nothing I can do about this: I tried everything I could think of, but still I have some 20 floating nets. In the next pic you can see the multi sheet connections I made: a repetition of a sensor sheet, all 8 of them hooked on a bus, and the bus going to the microcontroller.

So I haven't got anything floating really, yet Altium still sees it that way. Why is that?

Answer 1

I'd say yes you do have floating signals.

In picture 2, the diagonal lines are just graphical elements, they are not wires.

also: Did you specify the sub-schematic in the second picture as "REPEAT"?

Answer 2

You have three dots in your bus name. You should have two dots according to the docs: Sense[1...8] must be Sense[1..8]

Answer 3

When net labels are made part of a bus they don't need to be explicitly connected like in the right side of the first image. It is sufficient to have a bus somewhere with the same denomination as the netlabels, and these will be connected automatically.

So what happens in the first image is that the bus definition is done on the port by calling it ENABLE[1..8] and this already aggregates all the ENABLE signals defined on the Microcontroller's pins. So signal ENABLE1 is already connected to the micro's pin and to the bus.

Then from this port a bus is drawn and from this each individual signal is ripped out as shown on the right. So these signals are actually hanging without a usage point (sink) and this is why Altium throws the "net floating" warning.

[years ago I posted the answer as a comment to my original post, so then I cleaned this up by posting the correct answer]

Answer 4

Remove the net labels and nets coming from the bus ENABLE[1..8]. Leave only a port entry and bus