Connecting an 80's style computer cassette to an FPGA

Question

I'm re-implementing a 1980's Microbee computer on an FPGA (see here) and trying to figure out how to do the cassette port. Here's the schematics for the original Microbee cassette interface:

_{(source: toptensoftware.com)}

I also found this description of it in a technical manual:

The cassette data output consists merely of an RC network which accepts a signal from DB1, pin 28 of the PIO. The signal is attenuated and then decoupled prior to sending it to the cassette recorder MIC input. This signal appears on pin 3 of the 5 pin DIN socket.

The cassette data input circuit is slightly more complicated. The input from pin 5 of the DIN socket passes first to an attentuator -decoupler. Following this is a CA3140 op-amp, to allow a wide range of input levels to be squared up before the signal is passed to pin 27 of the PIO, DBO. The two diodes across the inverting and non-inverting inputs to the op-amp clip any input signals greater than the diodes' forward voltage in either direction. The 47pF capacitor is required by the CMOS op-amp for precompensation.

My questions:

1. What does "de-coupled" in the description mean?
2. Would the same circuit work if connected to two of the I/O pins on a Xilinx Spartan 6 FPGA (through the PMod connector on a Nexys3) and if not, could it be adapted to make it work?

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First attempt, based on comments in answers, but the output resistor shouldn't be in series.

I'm leaving this here for context and instructional reasons, please see the next schematic

MicrobeeSchematic2 http://www.toptensoftware.com/fpgabee/MicrobeeCassettePortSchematic2.png

New questions:

1. Is the polarity of the comparator correct?
2. For the MCP6546, does Vss go to ground and Vdd to 3.3V?
3. I'm not sure what to make of the "dotted out" resistor across the tape inputs in the original circuit.

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Incorporating feedback regarding the output of the comparator being open-drain:

MicrobeeSchematic3 http://www.toptensoftware.com/fpgabee/MicrobeeCassettePortSchematic3.png

What alternatives could I use for the MCP6546, which I've not been able to find in retail stores here in Australia. I can get LM311 or LM393 which, from what I can tell are similar. Will these work just as well?

Answer 1

1. Decoupling capacitors are known in circuits' power supplies, where they serve to keep the supply voltage clean of (high frequency) noise. But I have the impression that here removing DC content of your signal is meant, by means of a series capacitor, like C24 does for the input. Which, depending on your point of view (DC or AC) can be called a coupling capacitor. But there's no capacitor that does this on your output. The value of C23 is also suspectively low. The cutoff frequency with resistors R23 and R24 is 12 kHz, which is useless, because that will be about the frequency range of the cassette anyway. I'd rather expect 5 kHz here. Also the text speaks of the MIC input, but for that the output level is too high. The schematic mentions the line input.

2. The CA3140 is no good. Its minimum operating voltage is 4 V, and at 5 V the output high doesn't go higher than 3 V, so for 4 V supply that may be as low as 2 V, and that may not be enough for the Spartan. Use a Rail-To-Rail opamp instead, or even better a comparator.

edit re your new questions

1. Polarity is OK, since it doesn't matter :-). You have an AC signal going above and below ground. Like you've drawn it the positive half cycles will make the output go to Vcc, the negative to ground. If you switch the inputs you'll have the reverse, but both signals will look the same.

2. Yes.

3. I would ignore it. It doesn't seem to have a function other than loading the output, and besides, if you dot it out you're asking for being ignored :-).

Important thing about R1: this should go to Vcc, your 3.3 V, not in series with the output. The open-drain output means that there's only a FET switching the output to ground, so it can only make it low, not high. The pull-up resistor will make the output high when the FET is off.

Answer 2

Series capacitors are normally called 'coupling' capacitors since they couple the ac component of the source signal to the destination. Decoupling capacitors are shunt capacitors designed to prevent coupling of ac signals from source to detination.

In this context, C23 decouples the high frequency components of the PIO to ground so that the square-wave output becomes rounded ie approximately sinusoidal (your quoted article refers to 'decoupling' in describing the output to the tape port and so must be referring to C23).

Answer 3

The circuit as drawn should probably work with an FPGA if IC35 outputs a 0-to-3.3-volt signal. One slight caveat is that because cassette input does not have any hysteresis, it's possible that a signal which should appear as a single rising or falling edge may appear as a rapid sequence of rising and falling edges which then settles high or low a few microseconds later. That shouldn't be a problem if you design your FPGA so that it ignores input changes that last less than e.g. 10 microseconds, and ignores any input changes which occur within 20 microseconds of a detected change, but if your logic tries to measure the lengths of input pulses without enforcing a minimum length it could have problems.

Answer 4

1. The "decoupled" in this scenario probably refers both to the series capacitor that blocks DC (C24), and the C part of the RC (C23) although it should be "coupling capacitor" for C24 (decoupling is also used to refer to the DC blocking function, but I think it gets confusing this way, as it usually means the "other sort" that shunts AC to ground) and "decoupling" for C23 (if anything at all)
   The coupling cap is used commonly in audio amplifier circuits to allow one stages input to be independently biased from the previous stages DC output level.

2. Yes, as long as you supply the opamp with the same voltage as the FPGA pins (e.g. 3.3V, 2.5V, etc) rather than the 5V shown. You should be able to use pretty much any opamp for the comparator function (rail to rail is preferable to make things easy, as Steven says, but not essential as long as you meet FPGA input min-high max-low)