Common Mode Rejection Ratio (CMRR) is often explained as the ratio of out
and V1
in a circuit like the one below:
simulate this circuit – Schematic created using CircuitLab
This ignores Input Offset Voltage.
Input Offset Voltage (Vos) is usually explained as the V1
that makes out
to be zero in a schema like that:
This in turn ignores CMRR.
Usually only upper limits are provided for Vos, but no information on how it depends on common mode voltage or frequency.
Is Vos dependent on common mode voltage?
The point I'm trying to make is that when the Vos may change with common mode voltage, then what's the point of CMRR? Or is Vos considered to be a fixed voltage for each device?
What about input bias current?
I have the same problem with the currents. The datasheet gives me limits, but no indication on how 'stable' they are with frequency or common mode voltage.