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I have read about distance limitations of timing critical signals like communication over SPI. In order to get more distance between my Pi and my sensor I am considering using an analog sensor and an ADC.

Question: What should I know when considering the distance between my analog output and my ADC input? I am, at the moment, considering the impact on:

  • Linearity of sensor output and ADC readings
  • Delay between sensor output and ADC reading

Details:

  • Sensor output voltage: 0.25 to 4.75 V
  • ADC input voltage: 0 to 5 V
  • I hope to sample the sensor output at 50 kHz (seems a bit fast and too fast for SPI over a 1m distance)
  • I'm not really sure how to calculate the amperage the ADC will draw from the sensor output.
  • Sensor.
  • ADC.

Insight and references are welcome!

Edit:

I think a minimum of 8 significant bits is what I can work with. With a 500 unit range that's a measurement of 1/(2^8*500) = ±2 units.

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  • \$\begingroup\$ Delay is not significant. Noise is a more serious problem. What is the output impedance of your sensor? How many usable dB/significant bits do you want? \$\endgroup\$
    – pjc50
    Commented Jan 19, 2017 at 20:44
  • \$\begingroup\$ (essentially these are the same problems as faced by audio engineers with microphones on long cables, for which balanced XLR is preferred) \$\endgroup\$
    – pjc50
    Commented Jan 19, 2017 at 20:46
  • \$\begingroup\$ Interesting, I will read about the audio analogy. I think I need 8 significant bits and I'm trying to garner the output impedance from the datasheet. \$\endgroup\$
    – nate
    Commented Jan 19, 2017 at 20:58
  • \$\begingroup\$ Cable propagation delay is around 6ns/m -- so not an issue. 5V / 256 (8-bit) = 0.02V of resolution -- should be doable using common good practice. Now consider SPI -- 50kHz sampling rate probably requires around 1Mbps or higher SPI rate, that is 1us cycle time, definitely not too fast. Even using normal 3.3V/5V logic, noise margin can be seen as being in the 0.3V range, that is 10 times higher than the analog margin (0.02V). Follow good practice and series terminate the lines, I wouldn't rule SPI out. The real disadvantage is the need to supply power to SPI device. \$\endgroup\$
    – rioraxe
    Commented Jan 19, 2017 at 22:53
  • \$\begingroup\$ Thanks both, for the comments. Could you provide either some links to relevant material when considering voltage fluctuations on my signal wire - preferably including the factors that influence this. Otherwise a few more terms to narrow my search (It seems impedance is relevant - is there a theory or law I could start with?) \$\endgroup\$
    – nate
    Commented Jan 19, 2017 at 23:29

1 Answer 1

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Modern ADCs charge up a tiny capacitor, and then use 20_questions (binary search) to consume that charge with binary-weighted decisions.

The capacitor is approximately 10pF.

The average current will be FCV, or 50,000 samples/second * 10pF * 5volts.

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