I'm working on a mixed signal PCB that has some high-speed interfaces (HDMI, DDR, etc) I'm having some EMI issues on the HDMI that causes the product to fail radiated emission when the load is connected to the port via HDMI cable. While looking at the layout I noticed the CLK and data pairs each go through 3 vias between the connector and the uP.
Let's assume I have to use the number of vias I currently have due to space constraint. How important is via impedance to maintaining good signal integrity when dealing with high-speed interfaces?
What are typically the most important via parameters that can significantly affect signal integrity?
Signal goes from inner-layer1 to TopLayer to inner-Layer4 to TopLayer