In many microprocessor systems, it's possible for a glitch to send the processor into a state which will overwrite all addressable memory. If a processor includes software interrupts or traps on invalid instructions, and the associated interrupt vector points to another software-interrupt or an invalid instruction, then the processor may respond to the trap by pushing some registers onto the stack, jumping to the trap address, pushing some registers, jumping to the trap address, etc. If the act of pushing registers overwrites the trap vector with the location of another instruction that causes a trap or software interrupt, this process may continue with the stack pointer repeatedly wrapping so as to repeatedly hit all addressable memory. Note that while some processors have stack-bounds registers and double-fault handlers to deal with the scenario where an attempt to push registers in response to one fault causes a stack fault, and may have logic to force a shutdown or hard reset in the event that another fault occurs before the double-fault handler takes control of the stack, many older and/or smaller processors have no such concept.
If a single store to the address space of a flash or EEPROM could suffice to obliterate the content stored therein, such a microprocessor glitch could render a product useless until its firmware chip could be replaced. Ignoring any requests to write or erase information which are not part of a proper command sequence greatly reduces the likelihood of accidental firmware via this mechanism.