Although I've seen numerous recommendations for the use of FBs on the power supply rails of noise-sensitive analog circuitry, the opinions regarding their use with high-speed digital circuitry are conflicting. For instance, this link from TI, discourages their use stating that they block the power supply during peak current draw. They then discredit the use of bypass capacitors as a solution to this problem:
[T]he impedance of even the best capacitors is too high above about 200 MHz to supply enough peak power for the processor.
However, if you can't use ferrite beads in this context and bypass capacitors are similarly inadequate for filtering noise at the clocking frequency, how do you prevent the IC's noise from reentering the power supply? I imagine that linear regulators would also be insufficient here since they tend to have poor PSRR above a few hundred kHz (and the good ones I've seen don't do much above a few MHz). Although I know that PSRR deals with preventing input voltage noise from getting to the output, I don't know that it also deals with the reverse direction? Does it? Is there another metric for this?
Can I use ferrite beads and bypass caps for high-speed digital ICs and, if not, what would I use? If they're not suitable for high-speed digital logic, can I use them without issue for lower-speed digital ICs, say below 100MHz or so?