NRST pin of unpowered STLINK V2

Question

I am using the STLINK from a Nucleo board in order to flash and debug a STM32F7 MCU on a custom board.

Everything works fine except when STLINK is connected to my custom board AND unpowered. Indeed, in this case the MCU on my custom board doesn't seem to start.

After some investigation, I realise that it is the NRST pin (CMOS technology) from the STLINK which is shorted to GND when unpowered, shorting to GND NRST on my custom board.

A simple workaround is to disconnect the NRST pin from STLINK when it is unpowered but I would like to know if there is a way prevent NRST from being shorted to GND without having to disconnect this cable.

I tried a 10K pull-up resistor to VDD of my custom board but of course it doesn't change anything as it seems to be a real short to GND and not through a pull-down resistor.

Does anybody have knowledge of the exact architecture of the CMOS driver of NRST pin ? The piece of information provided by datasheet (p.67) is not really helpful as there are no exact characteristics of the CMOS themselves.

Answer 1

The GPIO information you're looking for is in the reference manual. Here's the structure of a regular, non-5V-tolerant^† GPIO pin on the STM32F103 series (used in the STLink/V2-1 on Nucleo boards):

Note that the top protection diode shunts voltages above the microcontroller's VDD into the supply rail to protect the IO pin. When the microcontroller is unpowered, that means that the IO pin might inadvertently sink current through the protection diode to power the microcontroller.

This parasitic power draw may be enough to overcome the internal/external pullup resistors on NRST and hold your main microcontroller in reset.

Unfortunately, without changing the design of the debug hardware, I don't see a good way to prevent NRST from being pulled to ground without disconnecting it. You might be able to find a series resistor value that allows normal reset operation (pulled to ground through the NMOS of the IO pin) while limiting the voltage drop when the debugger is powered down (pulled to ground through the protection diode).

Equivalent circuit for normal operation:

^{simulate this circuit – Schematic created using CircuitLab}

Equivalent circuit for unpowered operation:

^{simulate this circuit}

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†: Not all GPIO pins are designed this way - if you review Figure 14 on the same page, you'll see that the top protection diode for 5V tolerant pins feeds into a separate 5V rail that does not necessarily backpower the microcontroller.