How is this pole compensated

Question

I have an amplifier in a closed loop, the diagram looks as follows:

The DC gain is simple which \$ -Rf/R1 \$. If I make \$ -Rf=2\cdot R1 \$ the the DC gain is two. This is verified using AC analysis in Cadence.

However there seems to be a complex conjugate pole also, which leads to unstable behavior.

Hence I modify the gain equation as: \$Av= \frac{-Rf}{R1} \cdot \frac{1}{(s+\sigma + j\omega)(s+\sigma - j\omega)} \$. The notation \$ + \sigma \$ is because the phase goes negative. I observed that if I put a capacitor across Rf as shown in this figure then I can get rid of the complex conjugate poles. The value of capacitor is 1pF.

So now the gain equation becomes: \$ Av= \frac{-Rf}{R1 \cdot C} \cdot \frac{1}{(s+\sigma + j\omega)(s+\sigma - j\omega)(s+p1)} \$ where \$ p1= 1/Rf\cdot C \$ This equation checks out because at DC, the gain is \$ -Rf/R1 \$.

My question is, from this equation how is the pole being compensated? Is my analysis even correct?

To add more information the open loop gain of the amplifier is a single pole system as shown here:

Answer 1

To clarify, the phase scale on the graphs represents by how many degrees the output signal leads the input signal. So the lead starts at 180 degrees and reduces as frequency increases. That is to say the closed loop lag starts at 180 degrees at dc and increases towards 360 degrees as frequency increases.

By placing a capacitor across the feedback resistor you are adding a closed loop pole. This rolls off the closed loop gain at a lower frequency but also introduces some extra closed loop lag. It is apparent how in the third graph the lag starts to increase at a lower frequency. (The closed loop lead has reduced).

But you might think, hey wait a minute, extra lag means a reduction in phase margin and reduced stability.

What is important to remember is that it is loop gain and phase that determines stability, not closed loop gain and phase. That closed loop pole that you have introduced by adding the feedback capacitor is actually a zero in the loop response. A zero in the loop increases loop gain which reduces phase margin (which reduces stability) but the more significant contribution from the zero in the loop is that phase lead is actually added to the loop increasing phase margin which increases stability.

To understand this it can be seen that the added capacitor reduces the feedback impedance as frequency increases thereby reducing the closed loop gain and adding a lower frequency closed loop pole, but going around the loop from output back to input, as the feedback resistor is gradually shorted out with increasing frequency, the loop gain is gradually increased. That is to say there is a zero added with its loop phase lead benefit.

EDIT

Your open loop response plots don't seem to be correct. A single open loop pole amplifier would have a minimum of 90 degrees phase margin and would be very stable with no peaking in the closed loop response. Peaking in the closed loop response and complex poles co-exist together and require a low phase margin, much less than 90 degrees. To get the peaking you are seeing I would expect the open loop response to have at least 2 poles in order to get something approaching 180 degrees open loop lag with the resulting closed loop peaking at low closed loop gains.

By adding the capacitor across the feedback resistor you are improving phase margin by adding a zero to the loop with its resulting added loop phase lead. I would now expect the closed loop transfer function to contain two real poles in its denominator, one caused by the capacitor rolling off the closed loop gain and a second created where the closed loop response meets the open loop response after its second pole where it will be falling at between -6dB/octave and -12dB/octave. If the meeting of the curves occurs nearer the -6dB/octave gradient than the -12dB/octave gradient then there will be sufficient phase margin to keep the poles real. In this scenario there will be no peaking in the closed loop response and therefore no complex poles.

To determine the actual closed loop transfer function which will depend on the size of the feedback capacitor you would need to determine the open loop transfer function, Ao and then derive the closed loop transfer function from Ao/(1 + BAo) where B is the frequency dependent feedback fraction. The resulting maths drill down will show you whether the closed loop poles are real or complex.

If the falling closed loop response (actually the 1/B) curve meets the open loop response curve where it is nearer -12dB/octave then the phase margin will be too small, there will be complex poles and peaking in the close loop response. This could happen when the feedback capacitor is sized too large. In this scenario the closed loop gain rolls off too early, the closed loop gain (actually 1/B) levels off at unity creating a pole in the loop, adding loop phase lag which cancels out the zero's loop phase lead leaving the loop response with increased gain and too small a phase margin.

Answer 2

One common cause for the pole is: capacitance on the Virtual Ground of the opamp.

With high_value resistors, the DELAY on Virtual Ground, becomes large, and you get ringing or oscillation.

The feedback capacitor can be viewed as part of a voltage_divider with the VirtualGround capacitance. Thus at high frequencies, the delay is removed.