I'm trying to put my ZVS buck converter (DCM) in closed loop. I ran some simulations on MATLAB, and figured that just multiplying the transfer function of the open loop buck by 0.5 gives acceptable settling time, phase margin.
Now to implement this in the circuit, I used two inverting amplifiers, -0.5 and -1 (given by U3 and U4). The switching frequency is 300 kHz. So I tried to compare the output of U4 with the sawtooth wave of V4 whose period matches the switching frequency 300 kHz.
But I get a convergence error in Pspice. What am I doing wrong?
EDIT 1:- So I understood I made a mistake in the isolation of the gate pulse supplies,
This is the erroneous result I am always getting:-
The output should be 200 V. I checked the feedback circuit was working or not by replacing U2 with a diode, and it didn't give me any errors, but I'm not sure this proves that the feedback loop is not the problem.