I am putting together a latching circuit and just want to make sure I am not missing something obvious that would prevent this from working. Circuit:
Note: the actual LDO in the design is XC6701B502PR (DS: https://www.mouser.co.uk/datasheet/2/760/TOSL_S_A0003615205_1-2575136.pdf), but using what is already available in SPICE was quicker, should be sufficient for the purpose.
My explanation of what I am trying to achieve:
- POWER_SW simulates a switch which, when closed, connects to battery ~14V.
- M4 just a level shifter of the switch input down to 5V.
- Switch turns on M2 which then turns on M1. This pulls enable to 5V turning ON the LDO.
- With LDO ON, the output is fed back to the EN pin via D1. The LDO is now latched and will stay ON regardless of what the power button is doing.
- When POWER_SW is pushed down for a number of seconds, this detected by a controller and GPIO(SHUTDOWN) is pulled HIGH by the controller. M3 is turned on, EN is pulled LOW, LDO turns OFF with the rest of the system.
Running the sim seems to do what I expect:
A few questions I have:
- Am I missing something obvious here or will this work?
- Better/easier to achieve the same result?
- Why is output pulled to around -1V when my switch is off?
Appreciate any help or comments.
Cheers