The simplest way I can think of, is to use diode gates to steer charge around. A capacitor per pixel may be needed, but potentially the photodiode's own capacitance could be used (depending on how exposure is done, how fast/often readout can be performed, and desired sensitivity/dynamic range). That would probably be something like a mechanical or LCD shutter, versus electronically gating it.
Diodes are nice because they do a cromulent job of clamping/gating signals, and are available in dual pairs (e.g. BAV99DW, etc.). You also get one for free in the photodiode itself (give or take its capacitance, and whether photocurrent will be gated optically or electrically).
We could have a circuit like this:
simulate this circuit – Schematic created using CircuitLab
Normally, ROWn
are held high (+10V say), and COLn
are held halfway (+5V say). In this condition, photocurrents charge the capacitors (example values shown), at least until they reach 5V (at which point the COLn
diodes begin to turn on, and you get a visual blowout effect where a bright spot seems to smear across all rows; many real cameras have this effect, so this seems an acceptable compromise). To read out a row of pixels, drop the respective row to +5V, and read current on the COLn
s. We read columns in parallel to keep bandwidth high, or use an analog switch/mux to select one at a time (their charges should be reasonably stable while we scan a given row; of course if not, that's another source of error).
A charge amplifier (i.e. op-amp integrator) would be effective here, with the ROWn
edge falling rate controlled to avoid excess transient overshoot or peak currents in the amp. An integrator reset is also used to reset its value between pixels/rows.
Since readout is destructive (capacitor voltage is reset to a diode Vf, give or take), we don't need a separate reset circuit. This will give a rolling-shutter effect, where the frame is scanned in a raster, rather than a synchronous snapshot. (Also a commercially-justifiable compromise.)
We could even put the photodiode anodes on the columns directly, since they are diodes themselves; this introduces more error from photocurrent during the readout plus charge injection due to their relatively large junction capacitance (particularly at low bias voltage; notice they're kept at 5-10V reverse bias in the above description, which helps optimize photocurrent and capacitance).
Or we could put the photodiodes on the columns, ignoring the total photocurrent (or on the assumption that it's very small on average, compared to the pulsed signal current/charge), and using them as the column readout diode.
If we don't mind adding a few more components, we could include an electronic shutter for example:
simulate this circuit
While SHUTTER
is high, photodiode current is shunted into it (from any/all connected rows/columns, or in general as shown here), and when low, photocurrent charges the capacitors as usual. We can take an exposure by holding this high, reading out all the capacitors (resetting them), dropping it (letting charge accumulate for the desired time), then raising and reading out again. Since charge is stable (down to leakage / dark currents) with the "shutter" "closed", we eliminate the rolling-shutter effect, albeit at expense of reduced duty cycle and thus optical efficiency (we're not receiving signal during the readout phase), and continuity of observations (motion blur is now a discontinuous smear).
Note that the array can be folded into strips, so that for example if we only want to use two quad op-amps' worth of columns, we can introduce more rows, and weave the columns back and forth a few extra times. (Assuming we have enough layout area to do the layer changes and turn around the bus.) For example, a 32x40 array might use 8 x quad op-amps and 5 x octal decoders, but maybe we want to use 4 quad amps and 10 decoders -- because the decoders won't require resistors, capacitors, analog switches, etc. to support them. In this way, we can optimize the M+N as well as M*N component counts.
And, two or three components per pixel, is not too bad. And many of them can be arrays; quad capacitors, and dual or triple diodes (or dual pairs like the BAV99DW mentioned earlier) are common enough, and, photodiode arrays probably aren't suitable for obvious (mechanical) reasons, but if you can find some that are cheap and easily arranged in grids, that would be excellent.
A note on acceptable errors:
Assuming this would be supported by an MCU, or PC or FPGA for that matter, we can potentially tolerate quite gross behavior, as long as we still have adequate dynamic range for the signal in general. For example, we can calibrate out dark current and diode leakage by simply photographing a dark scene and subtracting those values from the readings; this also accounts for charge injection by the various diode junctions (or transistors, if we wish to use them for charge gating instead), which look like constant adders to the signal. Diode leakage currents will be proportional to exposure time, so a series of dark exposures could be taken, and used to calibrate with respect to that. If self-gating through the photodiodes themselves, photocurrent will be an error term in the charge measurement (i.e. since the measurement takes finite time, some current will be superimposed on the desired charge), but we can account for that as an error factor per pixel after calibrating the other effects out. And so on and so forth; if we have imperfect resetting between frames, we can subtract a (potentially nonlinear) fraction of the previous frame, and thus eliminate (or at least greatly reduce) tracking or motion blur. Other nonlinear functions can be employed as well, like gamma or log correction; a logarithmic amp could be used in the first place to maximize dynamic range at the array; or it could be variable-gain to act as electronic f-stop. Lots of possibilities.
Obviously, these corrections become more and more onerous as you go up in resolution and frame rate, but an FPGA, or application CPU probably for that matter, can handle pretty much as big an array as you might care to construct out of discrete components, while costing a tiny fraction of the overall assembly.
As for optical efficiency, if very wide-area photodiodes are used, much of the space between pixels could potentially be covered, and a both-sided PCB assembly could be used to carry all the components. Alternately, THT photodiodes could be used, to stand up above the SMT components (though I suspect wide-area parts aren't so well available in such format?). Still other, an, I suppose planar variant of a bug eye could be made: a lens array could focus incident light onto a fairly small photodiode, leaving ample room for components around them. This greatly restricts how an image can be formed on the array, of course; but perhaps we treat this as a feature rather than a (ha!) bug, and angle the lenses to target a particular wavefront/direction, or adjust alignment between board and lens array to play with adjustable angle and focus, etc.
We could also think about displays, in which case a very similar scheme might be used to set the gate voltage on an array of transistors driving LEDs. The gates of course have capacitance, so we don't need a sample capacitor, and some diode arrays and row/col drivers can be used to set things up. ID vs. VGS is rather notoriously unreliable (typically varying by a volt or so, but a volt also varies ID by a decade or two at the sharpest point of the curve!), but this could be measured by setting each pixel hot in turn and reading supply current, or even intensity with a photodiode at a distance. It should be compensated for temperature, and maybe periodically for drift too, but may be stable enough to work practically (well, "practical" given these are impractical neat-o project ideas to begin with, that is ;) ).