I am using the CAD drawing for the DS2777 from Maxim Integrated. http://www.maximintegrated.com/en/design/packaging/cad/?phase=proc&return_url=http%3A%2F%2Fwww.maximintegrated.com%2Fen%2Fdesign%2Fdesign-tools.html&search=ds2777&submit_btn=Search > DS2777+T&R.bxl.

When I am doing my board layout, I am getting the error "Clearance" between every pin on the chip and the autorouter is refusing to make any connections to it. How do I fix this?

  • \$\begingroup\$ Which DRC file are you using? \$\endgroup\$ – Dan Laks Sep 16 '14 at 0:01
  • \$\begingroup\$ What's a DRC file? \$\endgroup\$ – Ben Ramcharan Sep 16 '14 at 0:14
  • \$\begingroup\$ In that case, I'll try to explain the DRC file and the clearance issue below. \$\endgroup\$ – Dan Laks Sep 16 '14 at 0:15

Eagle, like all modern PCB layout software, uses a Design Rule Check (or something similar) to make sure your physical layout meets certain requirements. Eagle uses the DRU extension for these files. It checks that the spacing between any two conducting elements (traces, pads, vias, etc) are not too close together. It also checks such things as accidental overlap of traces and other obvious errors. In other words, it does a general sanity check to make sure your PCB passes some basic rules.

But what determines these rules? Quick answer: The fabrication house where you'll get your PCB fabricated (or the equipment you're using at home, if you're rolling your own). Every fab house will have their own requirements. For example, one house may not promise better than 8mil spacing between traces. Another (more expensive) place may promise down to 3mil. I like to use OSH Park for one-off designs for personal projects. They provide a DRU file for Eagle that has already been set up for their specific fabrication facility. Every facility will have different rules.

The problem you're having is the spacing between pads. I'm assuming you're using whatever default DRU file Eagle uses. Clearly, the pad clearance value it defaults to is larger than the pad spacing of the DS2777. Therefore, the default Eagle DRC is throwing a clearance error. To see the actual value it's using, click on the DRC button enter image description here on the toolbar and select the Clearance tab. The first column of fields in the "Different Signals" section show the Wire-to-Wire, Wire-to-Pad, and Wire-to-Via allowable clearances. The seconds column is Pad-to-Pad and Pad-to-Via. The last is Via-to-Via. The specific problem you're having is related to the Pad-to-Pad field. enter image description here

So what can you do? First, find out from your fabrication house what the actual design rules are for their facility. Maybe they'll even provide an Eagle DRU file for you to import. If not, get their design rules and manually create your own DRU file (this can be done from within the DRC feature). It's possible the pad spacing of the DS2777 is too close together for them to do, so be prepared to figure that out. Once you have the fabrication house-specific design rules implemented, run the DRC feature again and make sure everything on your board checks out.

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  • \$\begingroup\$ Thankyou. That was very helpful. I feel like I understand this much better now. \$\endgroup\$ – Ben Ramcharan Sep 16 '14 at 1:13

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