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If i solder together enough binary adders, binary subtractors is it possible for it to work like a modern (very very slow) CPU (Such as one found in a graphics calculator).

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    \$\begingroup\$ What do you think CPUs are made of? \$\endgroup\$ Commented Mar 14, 2016 at 5:40
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    \$\begingroup\$ It's a genuine question, and no need to downplay such. Short & crisp questions too need real answers. It's is about sparking ideas, sharing and discussing. \$\endgroup\$
    – seshu
    Commented Mar 14, 2016 at 6:18
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    \$\begingroup\$ Possible duplicate of Is there a name for "chips out of which one can build a CPU"? \$\endgroup\$ Commented Mar 14, 2016 at 9:55
  • \$\begingroup\$ You mean like this? \$\endgroup\$
    – peterG
    Commented Mar 14, 2016 at 12:53
  • \$\begingroup\$ Something like the old Intel 4004, 8008 or if you feel ambitious even the 8080 might be good targets to shoot for. The 4004 used 2,300 transistors, and the 8008 used 3,500 transistors, and the 8080 used 6,000 transistors, all according to Wikipedia. This is small enough to be practically achievable, and while not terribly useful by today's standards people did manage to do useful work with such CPUs. It also shouldn't be too hard to find documentation on these with some looking around. \$\endgroup\$
    – user
    Commented Mar 14, 2016 at 15:19

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Yes! One can build such a real slow processor with discreet logic put together. Or implement it in an FPGA.

(Assuming this may not have an immediate application and just for thought! Apologies if it is too lengthy. Just ideation!) Here are some basic steps one can consider-

  1. Develop an instruction-set first. List each instruction and required number of operands. Assign each instruction a unique binary number. Your instruction decoder is going to recognize these unique instructions by the number you assign.

If it's for a calculator application, focus on math operations. Basic arithmetic is easy. Scientific computing needs more sophisticated instruction set and architecture.

  1. Your instructions and architecture, implicitly define the bus-width (Instruction, Data - 8,16,32,64 or even 128 bits!)

  2. Build the instruction decoder. It will be a combinational logic circuit. And also supporting sequential logic for timing, sequencing and synchronization. At a very high level you can think of the instruction decoder as a decoder/demultiplexer. The signals of this block are going enable/disable and setup subsequent oprations.

  3. Build all the necessary registers, special function registers SFRs, I/O buffers, pins, enable/disable signals.

  4. Build the timers, counters, synch circuits

  5. Build special peripheral driving hardware circuits. With the example of calculator, it could be the screen, keypad, battery monitoring and speaker/buzzer etc.

  6. Build the ALU (Arithmetic Logic Unit). Actually build an advanced ALU!

  7. Build a nice math hardware. Also implement floating-point arithmetic hardware! (Special functions, Logs, Trigonometric functions are implemented as Taylor's series or other custom series math on some hardware)

  8. Actually we live in the age of data-science and AI. So implement array / vector processing units. Build a vector processor!

  9. Implement scratchpad, cache and other internal book-keeping memory areas.

  10. Build bus peripherals such as I2C, SPI and memory interfaces and any other useful peripheral one can think!

  11. Build program counter, fetch circuits before you feed the instructions to the decoder.. Or build an instruction pipeline and some instruction parallelism

  12. Look into C programming language specification. Try to fit your own CPU instructions to be compiled from that language. May be develop your own implementation specifics and develop your own compiler!

  13. Most importantly have a RESET implemented inside the circuit and also make it available on an external pin!

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In addition to combinational logic (which can form adders and subtractors), you'll need sequential logic (which allows the computer to have memory).

Yes, with enough components you could build a CPU.

Note that graphics calculator's CPUs can run at over 15 MHz. It is unlikely you could build a useful CPU that fast from discrete elements.

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TL; DR: Processors are made of logic gates and they have to be!


If you are talking about actual chips installed on a circuit board, read on. The PDP-11 processor is actually made mostly out of 7400-series TTL logic. Here I am talking about building your own 64-bot CPU out of those discrete logic chips.

Floor planning

For a processor to operate properly, you will need a few functional modules:

  • ALU,
  • System bus,
  • Register file (GPRs and number of them),
  • Program counter,
  • Instruction register,
  • Instruction decoder unit,
  • Controller unit.

I am not including memory or I/O peripherals as those are usually external to the processor if it is produced in chip form. Those go to the system bus and obey the controller too.

There are also some items to decide on before you start planning your processor:

  • Instruction set (determines how your instruction register, instruction decoder unit and controller look,)
  • Endianness (if you are using multi-byte machine words as we are now, using 64-bit words,)
  • Bus width

ALU

You can still buy the main ALU chips, 74HC181 and 74HC182, now, albeit now built using CMOS instead of TTL technology and consumes way less power than the original TTL ones. Using 16 74HC181s and 5 74HC182s you can get a basic, combinational 64-bit ALU. It will not perform as fast as your multi-gigahertz Core i7's but at a few kilohertz it can still do its job. Also it is a static core so you can slow it down to 0Hz if power is getting tight.

You may want to add a barrel shifter using, well, shift registers. A barrel shifter will accelerate things like multiplication a lot. 74HC194 seem like a good candidate. Loop 16 of them together and you get a 64-bit barrel shifter.

System bus

A bus is a set of signal wires that have multiple inputs and outputs attached. You will need to tri-state the outputs from a functional block to the bus or two devices outputting opposite signal will burn your board. You also may want to latch the inputs from the bus to the functional modules using a register, so you can let the bus transfer other information while the functional module is processing it.

A chain of 16 74HC173s seem like a good candidate for a single register. They features tri-state outputs, making bus management a lot easier. Put one set of these at places where you need a latched input.

Non-latched tri-state buffers can be built using a chain of 8 74HC241s.

Register file & instruction pointer

You need a register file for scratch space. Most of the registers will be uncommitted to any specific purpose, but at least one need to have special purpose: instruction pointer.

The instruction pointer is always increased by one instruction length after each instruction is loaded, always pointing to the next instruction coming up.

You may also want to have a stack pointer which allow some memory accessing instructions to read and/or write memory and modify this register in one atomic instruction.

Having a machine state word register is nice. Although there is nothing stopping you from using special instructions to transfer data to and from the hidden machine state word and a general-purpose register, that would make the assembler code a bit awkward.

The "zero" register may be nice to have but in reality it is mostly pointless, as it works just as well to mov r0, r1 as xor r1, r1, with the only exception that the latter may set the zero flag in the machine state word.

The general-purpose register file can be built using SRAM chips (as they practically are) like a chain of 6116s. The program counter and stack pointers may be better be built out of up/down counters like 74HC193 (if you have fixed instruction length and/or pushing length) or a secondary ALU. The machine state word is trickier to implement as it bridges between ALU and controlling unit, and usually are built out of individual D flip-flops like 74HC171.

instruction register, decoder and control unit

This is not a register accessible from the program. Instead it is the place where the instruction decoder and control unit work on. The control can be a big state machine programmed with state transfers in the form if some ROM (microcode, mostly used in CISC architectures) or a whole bunch of wires branching off demultiplexers upon demultiplexers (hard wiring controller, mostly used in RISC architectures.)

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The answer is yes. This is one example how it was done in early computer days.

https://en.wikipedia.org/wiki/Apollo_Guidance_Computer

The Apollo flight computer was the first computer to use integrated circuits (ICs). While the Block I version used 4,100 ICs, each containing a single three-input NOR gate, the later Block II version (used in the crewed flights) used 2,800 ICs, each with dual three-input NOR gates.[1]:34 The ICs, from Fairchild Semiconductor, were implemented using resistor–transistor logic (RTL) in a flat-pack. They were connected via wire wrap, and the wiring was then embedded in cast epoxy plastic.

This did not include memory:

The computer had 2048 words of erasable magnetic-core memory and 36 kilowords of read-only core rope memory.

Memory can be implemented using logic gates as well, but it takes a lot of them.

You might be interested to read up on early computer systems in the history files. There was a generation (or perhaps two) that were made using simple gates.

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