I have two separate analog control loops for battery charger circuit - one for voltage regulation and one for constant current mode.

I want to read voltage that comes to opamp via resistor divider and current value that comes from differential amplifier to microcontroller via ADC.

Should i buffer these voltages to read them via ADC? How do i decide?

Microcontroller i'm using is LPC1343.

The current measuring opamp has a low impedance output and won't cause problems. I didn't find an equivalent ADC input circuit in the NXP datasheet, but Atmel shows a circuit consisting of a 14 pF capacitor and a 1..100 k$\Omega$ series resistor (p. 259). That's high impedance, and won't disturb a resistive voltage divider.

But note that I/O pins often have a leakage current up to 1 $\mu$A, whether you use them as analog inputs or not. So if the voltage divider draws less than 100 $\mu$A I would buffer it. Use a low input bias current opamp as buffer, or you might have the same 1$\mu$A leakage as the microcontroller has.

Many ADCs have capacitors on the input stages which are connected to an input when taking a measurement, and disconnected from the input when not taking a measurement. If the voltage on one of these caps does not happen to match the voltage on the input at the time that happens, current will flow into our out of the input pin as needed to charge or discharge that internal cap. This may or may not affect circuit behavior; there are four scenarios of interest:

1. If the voltage on the cap happens to match the input voltage, no current will flow and there will be no problem.
2. If the input pin is tightly coupled to a capacitor which is much larger than the chip's internal cap, the external cap voltage will not be appreciably disturbed by the brief current, and there will be no problem.
3. If the input pin is connected via relatively low resistance to something that won't budge, such that any disturbance will be resolved between the time the capacitor is connected and the ADC takes its reading (that time interval is often called "ADC Acquisition Time, and on many chips is configurable), there will be no problem.
4. If the above conditions don't apply, the voltage on the output pin may be disturbed when the chip connects its internal cap, and such disturbance will affect the measured value. Problem.

On many chips, if a reading has been taken recently, the voltage on the internal cap will match the voltage of the last reading, whichever channel it was taken on. Thus, if one takes two or more consecutive readings with the same channel, the effects of the capacitance on the reading will be relatively minor; taking a reading on another channel which is at a different voltage, however, may corrupt the first reading taken after the system is returned to the original channel.

On some chips, the voltage on the cap seems to be effectively random; regardless of the sequence in which readings are performed, the cap will sometimes add charge and sometimes remove charge, and taking consecutive readings on the same channel won't help. The only thing that will help is setting the ADC acquisition time long enough for the pin to settle.

If you have access to a scope, it may help make it possible to see whether inputs are being affected by these phenomena. It may not tell you everything you'd like to know (many scopes let one see signals within about 1%, and it's often desirable to take ADC readings that are more precise than that) but it should give some useful clues.

The input capacitor on the ADC can easily be a small problem if the source of the analog voltage is an op-amp with high gain. Op amps can be made unstable by the presence of a capacitor, especially sudden presence.

For example, this is what happens when the sampling capacitor of a MCP3204 ADC is connected to the output of an AD8556 instrumentation amp with a gain of 1000.

Notice that at the moment of sampling, the anglog signal suddenly droops, and bounces back above its original level before settling down. This was causing noticeable noise on my reading.

To counter this, I made sure that the ADC sampling time finishes some time after the signal settles down. I did this by leaving a small gap in the CLK signal during this time.

But will the voltage droop affect your analog control loop?

It needn't do. I doubt your control loop needs to react to changes as fast as a couple of microseconds. In which case, you can simply filter the analog with a resistor and capacitor. (Don't have Altium on this PC, otherwise I'd draw you a schematic)