I have been recently learning about ethernet subsystem. I see that the MDIO interface is shared across multiple (upto 32) PHYs from a single MAC and each PHY's state can be accessed using the 5-bit PHY address. But can I route the MII/RMII signals to individual PHY or a subset of PHYs connected to the MAC and transmit the data only through those PHYs? Or Can the MII interface only be shared with all the PHYs and all PHYs simultaneously transmit the same data received from the MAC?
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Typically, a set of MII lines are connected from the MAC to a single PHY. The reason for multiple addresses for MDIO is for SOCs that contain multiple MAC modules and for switch chips. The MII from each MAC module connect to its PHY. However, to save pins on the SOC, there will be only one set of MDIO pins. The MACs will share these lines communicating with their PHYs, selecting each one by address.
In the case of Ethernet switch chips, where there would be many PHYs attached, there will be multiple MDIO sets to connect to subsets of the PHYs.
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\$\begingroup\$ Thanks DoxyLover, I am a bit confused on the Ethernet switch chips. Do these chips have multiple PHYs attached to a single MAC? Why are they different to typical setup? \$\endgroup\$– gmancityCommented Dec 17, 2017 at 8:14
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\$\begingroup\$ No. Normally, there is a MAC (or the equivalent) for each port. The thing is that on a switch, as opposed to a hub, each port can be processing packets simultaneously so separate MACs are required. \$\endgroup\$ Commented Dec 17, 2017 at 8:56
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\$\begingroup\$ Awesome, this clears things up. I found this text on link Wikipedia: "The bus only supports a single MAC as the master, and can have up to 32 PHY slaves." I guess this actually means that, "The MDIO interface could be shared by multiple MACs. But at any single point of time, the bus only supports a single MAC as the master, and can have up to 32 PHY slaves." \$\endgroup\$– gmancityCommented Dec 17, 2017 at 23:26
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\$\begingroup\$ @gmancity Really the MDIO master doesn't have to be a MAC. In reality, it's probably a CPU. Also some types of connection can have multiple PHYs in a chain. \$\endgroup\$ Commented Jun 22, 2020 at 13:12