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I am new to programming in ladder logic and am trying to write a simple program wherein outputs Y65 and Y66 follow the sequence:

  • Y65 turns on for 30 seconds.
  • Y65 turns off.
  • Y66 turns on for 30 seconds.
  • Y66 turns off.
  • Repeat.

I am using timers and internal bits to achieve this but I am having a few issues: 1) Y65 remains on for the entire time and Y66 turns on and off immediately. I have attached snapshots of my program. X1 and X2 are physical hardwired inputs; C1, C2, C3 and C4 are internal bits; Y65 and Y66 are outputs. Any help would be appreciated.

Program Top Program Middle Program Bottom

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  • 1
    \$\begingroup\$ What PLC is this for? A DirectLogic? \$\endgroup\$
    – Ron Beyer
    Commented Jan 24, 2018 at 3:48
  • \$\begingroup\$ There's so much unnecessary white space in your images making them so small that I have to click on each for an enlargement. Nope. \$\endgroup\$ Commented Jan 24, 2018 at 4:15
  • \$\begingroup\$ There are many ways to accomplish this, it would be helpful to know what PLC you are using, as the instruction sets may be slightly different between manufacturers. \$\endgroup\$
    – Tyler
    Commented Jan 24, 2018 at 13:18
  • \$\begingroup\$ The question is tagged "siemens". \$\endgroup\$
    – Ben Miller
    Commented Jan 24, 2018 at 13:32

1 Answer 1

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Your screen grabs are too difficult to read.

It sounds as though you are looking for a 60 s clock with 50% duty cycle. The normal method is to generate a timing sequence as follows:

               ________          ________
TMR1  ________|        |________|        |_________

TMR2  _________________|_________________|_________

Figure 1. TMR1 output turns on after 30 s and enables TMR2. TMR2 turns on after a further 30 s and resets both TMR 1 and itself.

This is accomplished as follows (without knowing your timer syntax):

Always
  on   +--TMR1--+           Y66
--| |--|EN      |-----------( )--
       |        |
   C1  |        |
--| |--|RST     |
       +--------+

  Y66  +--TMR2--+            C1
--| |--|EN      |-----------( )--
       |        |
   C1  |        |
--| |--|RST     |
       +--------+
  Y66                       Y65
--|/|-----------------------( )--

Figure 2. Ladder layout.

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