When assembling the code, I get the error : fpu.s(13): error: A1240E: Immediate value cannot be used with this operation

EXPORT __main
    LDR R0,=0XE000ED88
    LDR R1,[R0]
    ORR R1,R1,#(0xF << 20)
    STR R1,[R0]

    VMOV.F32 S7, #0x419c0000
    VMOV.F32 S8, #0X41B40000
    VADD.F32 S9,S7,S8

  • 2
    \$\begingroup\$ I consider this question as off-topic, because is solely programming related, no matter what platform is used. \$\endgroup\$ – Ariser May 8 '18 at 7:28
  • \$\begingroup\$ Be consistent with your hexadecimal numbers. Use #0xFFFFFFFF instead of sometimes using #0XFFFFFFFF. You can confuse the compiler with being inconsistent. \$\endgroup\$ – Sparky256 May 8 '18 at 7:42
  • \$\begingroup\$ @Sparky256, the compiler will get confused? I thought it either rejects completely or accepts syntax for constants and those look legal enough. \$\endgroup\$ – TonyM May 8 '18 at 9:38

In VMOV, the F32 format expects the following argument as immediate value:

Any number that can be expressed as \$\pm n \times 2^{–r}\$, where n and r are integers, 16 <= n <= 31, 0 <= r <= 7.

You have the following immediate values:

$$ \text{0x}419C0000 = 4199\times2^{18} \\ n = 4199 \quad r = -18 $$ and $$ \text{0x}41B40000 = 4205\times2^{18} \\ n = 4205\quad r = -18 $$

In both instructions, the immediate values are clearly out of the expected range. You should scale these parameters beforehand.

  • \$\begingroup\$ This was my thought too, but checking the user guide for the cortex-m4 this restriction isn't listed. infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/… \$\endgroup\$ – Colin May 8 '18 at 7:37
  • \$\begingroup\$ @Colin__s Not sure I follow, the same description of value ranges is there in the link you presented. Do you mean to say the assembler should turn a blind eye to this? \$\endgroup\$ – Vicente Cunha May 8 '18 at 7:43
  • \$\begingroup\$ please check the link again, I had the wrong thing on my clipboard when I first commented. The cortex m4 manual states "Restrictions There are no restrictions." \$\endgroup\$ – Colin May 8 '18 at 7:46
  • \$\begingroup\$ @Colin__s Indeed, this seems the case. If value ranges are not to blame, my next guess would be wrong target configuration. \$\endgroup\$ – Vicente Cunha May 8 '18 at 7:56
  • \$\begingroup\$ @Vincente I have used ARMCM4_FP simulated processor core. \$\endgroup\$ – Nirmal Anand May 8 '18 at 8:00

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