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I'm trying to build cheap H-bridge driver to operate under 12-24 input voltage. I used 12 V regulator as separated Vgs voltage driver, also to increase load current and I paralleled two MOSFET with each other and separate gate signal, so it is consist 4 P & 4 N MOSFET type. I used NAND Schmitt triggers circuit with Enable, Direction and PWM control as per following image, but when I fabricated the board and connected to 12 V power supply and 12 V DC motor, under low PWM frequency (450 Hz) which is made by Arduino uno and no load on motor shaft, it's got unexpectedly so HOT. My NAND Schmitt triggers circuit seems has no design problem and I thought pull-push gate drive circuit for P-MOS with enhanced switching speed. I don't know where should I look for this problem. Following is the MOSFET data

  • SSD20P03 P-MOSFET: 24A, -30V, RDS(ON) 59mΩ
  • VGS 20
  • Total Gate Charge 6.4nc
  • Gate-Source Charge 1.9nc
  • Gate-Drain Charge 2.5nc
  • Input Capacitance 520pf
  • Output Capacitance 13pf
  • Reverse Transfer Capacitance 70pf
  • Turn-on Delay Time 10ns
  • Rise Time 2.8ns
  • Turn-off Delay Time 53ns
  • Fall Time 46ns
  • SUB45N03 N-MOSFET: 45A, 30V, RDS(ON) 13mΩ
  • VGS 20
  • Total Gate Charge 40nc
  • Gate-Source Charge 7.5nc
  • Gate-Drain Charge 8nc
  • Input Capacitance 2000pf
  • Output Capacitance 370pf
  • Reverse Transfer Capacitance 180pf
  • Turn-on Delay Time 11-20ns
  • Rise Time 9-20ns
  • Turn-off Delay Time 38-70ns
  • Fall Time 11-20ns

enter image description here

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    \$\begingroup\$ Measure some waveforms \$\endgroup\$
    – PlasmaHH
    Commented Sep 13, 2018 at 9:38
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    \$\begingroup\$ because your pfets' gates are being pulled to 12v but they're referenced to 24v? \$\endgroup\$
    – Taniwha
    Commented Sep 13, 2018 at 9:38
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    \$\begingroup\$ There is something strange about your schematic. It's missing connection dots in a lot of places. For example, are you sure that there is a connection between the +24V and the PFET drains? \$\endgroup\$
    – dim
    Commented Sep 13, 2018 at 10:10
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    \$\begingroup\$ Sorry to be the one to inform you, but your success rate at debugging this without an oscilloscope is very low. And what @dim said, no connection dots so your schematic is guesswork. What is 450 f? 450 Hz? \$\endgroup\$
    – winny
    Commented Sep 13, 2018 at 10:12
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    \$\begingroup\$ @Hamid you should update your original post instead of providing the updated schematic through a link. \$\endgroup\$
    – dim
    Commented Sep 13, 2018 at 11:20

2 Answers 2

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OK, I want to give you a few points I see directly on your design to be problematic:

  1. Generation of Forward and Backward signals is off. There is some logic error there if you look closely. If you put ENABLE=1 and PWM=1 the output of IC1E is leading to a short circuit between your logic supply voltage and GND. This will eventually pull VCC down to a few volts. (could be even the origin of your first problem). Does your arduino not get hot as well?
  2. What is the power supply of IC1? 5V? Your lower FETs will like a gate voltage of 10V better than only 5V.
  3. Even if you put small resistors at the lower gates, the IC1B/C must source this current. Looking in the datasheet quickly reveals that these chips can only handle a few mA. You will not be able to switch your lower FETs quickly.
  4. The basis of Q57 and Q58 only have a connection to the zener diode. See also other answer from Tony EE rocketscientist.

All in all I'd like to advice you to instead use a dedicated MOSFET driver chip. Simple ones are e.g. IR2103 chips. They have most of your functionality on board and you need a handful of components. I think this is better suited also because of the lack of oscilloscope and other measurement equipment.

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  • \$\begingroup\$ I agree that the Cmos Logic ICs have no power supply. The 10106 has an output current that is much too low to quickly charge and discharge the gate capacitance of the N-channel Mosfets. \$\endgroup\$
    – Audioguru
    Commented Mar 30, 2022 at 0:58
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enter image description here

Just a little change above for Pch bias.

Then verify dead-time results with reactive loads for shootthru margin.

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  • \$\begingroup\$ thanks @TonyEErocketscientist , I removed 12v and connected all top parts with +24v line, (please check my updated schematic) , however I don't understand why you connect GND line to power line (+24v) \$\endgroup\$
    – Hamid s k
    Commented Sep 13, 2018 at 11:45
  • \$\begingroup\$ That's low ESR Cap (s) 1% of RdsOn +DCR total, right across drivers for small current loop on transients. \$\endgroup\$
    – D.A.S.
    Commented Sep 13, 2018 at 11:56
  • \$\begingroup\$ @Hamidsk - That's not a ground connection, it's a capacitor. You want it there to handle load transients when the circuit switches. \$\endgroup\$
    – WhatRoughBeast
    Commented Sep 13, 2018 at 11:56
  • \$\begingroup\$ thanks @TonyEErocketscientist for clarification but still understand why you added 2k extra resistor ?! honestly this sketch come from last question posted here and answered by Olin-lathrop -this question link \$\endgroup\$
    – Hamid s k
    Commented Sep 13, 2018 at 12:01
  • \$\begingroup\$ That's a level shifter V/2 to Vcc. since you made Vcc=12~24V a Zener current limited is ok \$\endgroup\$
    – D.A.S.
    Commented Sep 13, 2018 at 12:47

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