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I have always this mindset that to drive a MOSFET you have to apply a certain voltage to the gate of the mosfet to turn it "on" But it would seem that it not entirely true, you have to apply a certain voltage into the gate with reference to the source pin not necessarily the ground pin (correct me if im wrong).

For situations stated below i will use the two ADVERTISED as LOGIC LEVEL MOSFETS the BUK9134(NMOS) and FDS8935 (PMOS)

When both used as a switch the NMOS is pretty much staight forward, because NMOS is typically used as a low-side switch a logic-level NMOS like mention above will always turn on at logic 5v HIGH because the gate pin is referenced to the SOURCE pin which is connected directly to ground(which the Logic ground is also referenced). So no matter what voltage that im switching the mosfet will turn on and off with my logic singal. (Again correct me when im wrong about something)

enter image description here

Here is where im confused about. PMOS on the other hand Works the same As NMOS but when used as a typical high side switch the Source pin is not connected to ground but to Vcc!.

enter image description here

Now at logic 5v high my mosfet will probably gget destroyed because the voltage at the gate (referenced to source) will be -45v which is waaay past the +- 20. Now thats not ideal since the the highest i can run it with my 5v logic is 20v way below its rated 80v. If that is so why advertise PMOS's as "logic level gate" (Digi-Key) when with common logic levels i wont be able to use it properly on high voltages(or currents). Is there a trick that i dont know off to drive it at logic level ?? Pulling it up to source voltage seems also not ideal because for example of the IC i mention if my source voltage is 50 the voltage at the gate is 50v witch is beyond its capability of +-20v.

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  • \$\begingroup\$ It may help to draw the PMOS cct with 0V at the top and -50V at the bottom. Then Vg=0V (off) and -10V(on). Translating logic levels from -50V and -45V or -46.7V (0 and 5 or 3.3V from your MCU) to these gate levels is required. \$\endgroup\$
    – user16324
    Commented Apr 24, 2020 at 23:41
  • \$\begingroup\$ All transistors (MOS or bipolar) only know or care about the voltages between their own terminals - they don't know or care where you think "Ground" or "?Zero Volts" is. \$\endgroup\$
    – Peter Bennett
    Commented Apr 24, 2020 at 23:56
  • \$\begingroup\$ @BrianDrummond For fixed voltage that would be great, but how would do it if the input voltage is variable, from lets say from low as 5 to as high as 50 ? \$\endgroup\$
    – DrakeJest
    Commented Apr 25, 2020 at 0:19

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With the PMOS device you'd limit the gate-source voltage (Vgs) to a safe value, say -10V. To do that you have to translate the gate drive up to near the 50V rail, so that gate voltage swings between 50V and 40V (assuming -10V max Vgs).

A way to do that is to use an NMOS driver like you've shown, connected to a resistor voltage divider up to 50V, configured such that when the FET is 'on' the divider is 40V to turn on the P-FET. When off, it will pull to 50V and shut the P-FET off.

This approach has a drawback of having a slower switching time due to gate capacitance, but for a simple load switch would work fine.

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  • \$\begingroup\$ hmmm ,a output of 4/5 voltage divider seem good that means i can go as low as 6v and as high as pretty much upto its max 80v. Does this circuit looks good ? \$\endgroup\$
    – DrakeJest
    Commented Apr 25, 2020 at 0:33
  • \$\begingroup\$ its a shame that you have to use another mosfet inorder to drive a "Logic Level" Pmos \$\endgroup\$
    – DrakeJest
    Commented Apr 25, 2020 at 0:35
  • \$\begingroup\$ Yes, that driver would work ok (10k/40k divider.) As far as the problem with going from logic to high-side switch, that's why low-side switch is popular - it doesn't need translating. \$\endgroup\$
    – hacktastical
    Commented Apr 25, 2020 at 0:40

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