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How does source resistance manifest in the small-signal model for NMOS transistors?

I've come across two conflicting models for this case: the first seems to ignore the source resistance and neglect to include it in the model at all. For example, on page 3 of these lecture slides from Berkely.

The second case(which my prof used in lecture) added the source resitance to the model between the negative vgs terminal and the gm*vgs current source. The resistor was connected directly to ground.

Which case is correct?

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For small-signal analysis we are interested only in the ac component of any voltages. We assume that the impedance of any capacitor is very small for frequencies of interest, so we replace the capacitor with a short circuit.

In the lecture from UCB you see that the source resistor is bypassed with a capacitor, so the capacitor and source resistor are shorted out for small-signal analysis.

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  • \$\begingroup\$ Completely overlooked the bypass capacitor. So in the case where there is no capacitor, would we include the source resistance where I indicated? \$\endgroup\$
    – NolanTremelling
    Commented Mar 12, 2022 at 15:58
  • \$\begingroup\$ I think so, but it would be more clear if you could add a schematic. \$\endgroup\$
    – Elliot Alderson
    Commented Mar 12, 2022 at 19:34

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