Design confusion with a MOSFET as switch

Question

I am trying to design a simple battery operated circuit (ESP8266) controlled by a MOSFET (schematic below).

I was going through some videos to understand better and came across this video.

He talks about about the MOSFET V_DS requirement to be 0.5 V at 2.57 time. He is subtracting the min voltage requirement of ESP8266 which is 2.5 V from a battery voltage of 3.0 V and thereby determining the V_DS to be 0.5 V.

I thought the V_DS is the max voltage that can flow between the source and drain terminals which in this case is 4.2 V. What am I missing? Are the following calculations correct? I seem to be confused with this.

The P-channel controls the high side positive rail to MCU while the N-channel controls the P-channel MOSFET.

V_DS(max) across PFET will be maximum 4.2 V and min of 3 V when used with a LIPO.

V_GS(min) across PFET = -3 V

V_DS(max) across NFET will also be 4.2 V

V_GS(min) across NFET = 3 V

I_DD continuous across PFET will be a max of 300 mA

Answer 1

VDS(max) is a parameter of a MOSFET, and is the maximum voltage that may be applied between the Drain and Source terminals.

You need to work out the required Ron (the resistance on the Drain-Source channel in the on state) with the given voltage difference and load current.

You've already worked out the maximum voltage drop you can tolerate at 0.5V, and you've stated you need to support 300mA of current for the MCU and any loads. Divide one by the other, and you can work out the maximum Ron you can tolerate is 1R7.

Remember that Ron will vary according to actual Vds and gate drive, so check the datasheets carefully and build in some margin. Having said that, there are now lots of very low Ron, low gate drive MOSFETs designed for exactly this kind of use.