The load capacitance mentioned in the crystal datasheet is 10pF and
the shunt capacitance is 5pF
The Microchip document appears to factor-in the internal shunt capacitor of the crystal but, the information presented in the question is without full context. If you read below the featured extract you will see this: -
So, despite erroneously appearing to take account of the crystal's shunt capacitor, the Microchip document redeems itself by advising the reader to assume it is zero.
In other words, if the crystal supplier says that the crystal works optimally with 10 pF of loading capacitance then this will trump the information given in the chip supplier data sheet.
So, 10 pF of loading capacitance ensures optimal frequency accuracy of the crystal. It also sets the correct operating power level for the crystal. I trust the crystal supplier's data sheet.
To get 10 pF of loading requires 20 pF capacitors to 0 volts on either side of the crystal. But, you need to take into account stray capacitance of the tracks on the PCB and the input capacitance of the Microchip device. It's likely that the input capacitance of the chip is about 4 pF (check to see if the data sheet mentions this). If the data sheet is weak in this area then you should consider contacting Microchip.
I expect that the parasitic capacitance of the PCB tracks are going to be about 0.5 pF (not 2 pF) but, you can calculate this more thoroughly.
So, based on 4 pF input capacitance and 0.5 pF track capacitance, you would naturally choose values shown below in red: -
But, it won't be too far out if you averaged both out to be 17.5 pF and, of course, 18 pF for each side won't be a show-stopper.
Extra section
Having fully read the Microchip document, the XTALIN capacitance is stated as being 6 pF: -
Absent from that table is any mention of the XTALOUT capacitance and, there's a reasonable explanation for this. That explanation is that the series output resistance of that pin dictates performance. A series output resistance is fundamental to how these types of crystal oscillators work. The value will be a few tens of ohm up to several hundreds of kΩ (for wrist-watch crystals). For this chip it might be around 20 or 30 Ω and, any parasitic capacitance might be a couple of hundred femto farads (negligible).
So, given all I've said in this added section, you might be tempted to lower the input capacitance to 13.5 pF and keep the external output capacitance at 19.5 pF for absolute best crystal frequency accuracy. If clock accuracy isn't a massive factor then stick with 18 pF on each pin to 0 volts. If an accurate clock frequency is important then make the input capacitor 15 pF.
For a little more context on how much a crystal's frequency is affected by loading capacitance, I've added a couple of images from my basic website. The top image is the equivalent circuit of a crystal that has precisely 10.000000 MHz series resonance: -
The "loading capacitors" are CL1 and CL2. The XTALOUT ESR is R1. This shows how much the crystal's frequency can vary with different loading capacitors: -
The bottom line is that you might see something like a +/-200 Hz change across a significant range of tuning capacitors. I can't tell you if this might be too much of course.
