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SR-NOR Latch circuit is a sequential circuit in which there exist two, different modes Reset and Set. Electricity flows along these modes at different voltage intensities, either high or low. High voltage represents true state, while low voltage represents false state. Whose truth table then looks like:

$$\begin{array}{C|C|C|C|C|C} S & R & Q & \bar{Q}\\ \hline T & F & T & F\\ F & T & F & T \\ F & F & T/F& F/T\\ T & T & - & - \end{array}$$

Whenever electricity flows along both modes at low voltage, the state of the circuit remains invariant, as indicated in the third row. However, how does a computer retrieve the information from this kind of circuit?

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    \$\begingroup\$ It looks at the output. But what is about it you are asking? Currents? Voltages? Logic states being true or false? I mean, that is a computer, or building block for one. It has a lot of similar blocks with inputs and outputs, connected to each other. \$\endgroup\$
    – Justme
    Commented Jun 20, 2023 at 19:05
  • \$\begingroup\$ It is captured exactly the same way as your set and reset inputs already work. Do you know how the inputs and outputs on your logic gates work? (I ask this because there are different families of logic gates, even if assumption about CMOS would be likely). \$\endgroup\$
    – Justme
    Commented Jun 20, 2023 at 19:17
  • \$\begingroup\$ @Justme I am afraid that I am new to these logic gates, so no, I cannot say that I possess precise knowledge about them. However, I understand how logic gates perform the manipulation of incoming electrical signals. \$\endgroup\$
    – Cake
    Commented Jun 20, 2023 at 19:52
  • \$\begingroup\$ so the next level below your current level of abstraction of logic gates might be, how a logic gate, such as NOT or NAND are made of, e.g. with CMOS logic or other logic? \$\endgroup\$
    – Justme
    Commented Jun 20, 2023 at 20:46
  • \$\begingroup\$ @Justme Yes, I think so. \$\endgroup\$
    – Cake
    Commented Jun 21, 2023 at 9:13

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Your circuit represents one bit of memory. So it is capable to "hold" the value 1 or 0. Example, If the circuit is one bit of RAM and you want to pass its value (Q) to accumulator, you must connect some gate (like AND) on Q output and enable passing with enable pulse.

schematic

simulate this circuit – Schematic created using CircuitLab

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