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I am currently converting an TMDS signal into composite. Please see block diagram. The video encoder outputs the H-Sync and V-sync. I am also getting an external sync source that I need to use to Genlock the composite video that I am outputting. My questions are:

  1. Should I just feed in the external H-Sync and V-Sync into the DAC ADV7393 and ignore the sync coming out of the ADV7610? If not why?
  2. Is there an IC that can help me do what I want to do? If not do I need to change the encoder or DAC ICs that have genlock capabilities? block diagram
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2 Answers 2

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Should I just feed in the external H-Sync and V-Sync into the DAC ADV7393 and ignore the sync coming out of the ADV7610? If not why?

In the current circuit: no. The sync signal would have to be somehow supplied to the TMDS source, so that it would generate genlocked TMDS. Only then you could discard the sync provided by the TMDS-to-composite converter, assuming the converter has a minimal group delay.

Is there an IC that can help me do what I want to do? If not do I need to change the encoder or DAC ICs that have genlock capabilities?

By the time it reaches the DAC, it's too late more or less.

If the TMDS source cannot be genlocked - as would be the right way to do it - then the encoder would need to have a frame buffer.

And then it would just be the output that's genlocked, not the digital source. The encoder would be outputting the most recent frame, so sometimes a TMDS frame would get dropped, and sometimes it would be duplicated. That would depend on the relative phase of the TMDS vsync and the genlock vsync.


So, my strategy would be:

  1. Look into genlocking the TMDS source; or
  2. Get an encoder that has a framebuffer and can re-time the signals to an external sync; or
  3. Add a two-port FIFO between the output from the encoder and the DAC. Read out the FIFO based on the pixel clock recovered from the genlock source. To protect against underruns, the FIFO would need a loopback from output to input that's enabled when the genlock VSYNC is very early in the source frame (say the first 1-2% of the frame period). That way the frame would be duplicated.
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  • \$\begingroup\$ I might need to open up another question thread, but regarding option 2, it seems that there isn't much in the market out there. Is there an example of one that can help me start looking somewhere? \$\endgroup\$
    – miggyEE
    Aug 30, 2023 at 16:47
  • \$\begingroup\$ @miggyEE All it takes is an FPGA. Get one with enough block RAM to keep a few full-resolution lines to interpolate with, and then the SD-resolution output frame. Not terribly hard if you only need to deal with one or two resolutions on the input. \$\endgroup\$ Sep 1, 2023 at 18:42
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  1. No of course not, it will not work because the two video sources have different clocks that have arbitrary frequency and phase relation to each other so if you use pixel clock and data from TMDS you also need H and V syncs that are related to TMDS data.

  2. If you can't generate the pixel clock for the TMDS source from the external syncs you want to use, then the only thing left to mix two arbitrary video signals together is a video processor with a frame buffer. You feed in the TMDS video with the clocks and syncs it has into frame buffer, and then you use the external syncs to clock the video out from the frame buffer. You do need the pixel clock for the output too and that may be difficult to achieve stably with a PLL.

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  • \$\begingroup\$ using a PLL, I should be able to get pixel clock from it. Why would I still need H and V syncs that are related to TMDS data? I thought the purpose of the pixel cock is to discard the H and V syncs? \$\endgroup\$
    – miggyEE
    Aug 30, 2023 at 19:17
  • \$\begingroup\$ @miggyEE If you discard H and V sync, how do you know from a stream of billion pixels which ones of them start the image from top left corner and which of them is the first pixel on the next line? OK, so if you use embedded syncs then yes, but the embedded syncs have to be in sync with your external syncs. \$\endgroup\$
    – Justme
    Aug 30, 2023 at 19:19
  • \$\begingroup\$ Okay thank you for clarifying. I probably am understanding this wrong, but if I do generate the pixel clock for the TMDS source from the external syncs, what do I do with this clock? Am I supposed to feed this clock into my CPU or the HDMI receiver? \$\endgroup\$
    – miggyEE
    Aug 30, 2023 at 20:19
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    \$\begingroup\$ @miggyEE The CPU must use that clock for TMDS that relates to your external video instead of some unrelated internal clock. Which may not be possible of course. \$\endgroup\$
    – Justme
    Aug 30, 2023 at 20:30

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