Skip to main content

Questions tagged [synchronization]

Synchronization is the coordination of events to operate a system in unison. In digital systems this is usually accomplished by using a clock signal. (From: Wikipedia)

Filter by
Sorted by
Tagged with
0 votes
0 answers
117 views

What is the best approach to switching heavy loads with parallel MOSFETs?

I am going to build a spot welder with 20 MOSFETs in parallel (datasheet), each one capable of delivering 550A (1.2 kA peak approx.) powered by 35 mm2 cables connected to a 60 Ah 12 V car battery. In ...
Roberto Tascioni's user avatar
0 votes
0 answers
38 views

What is the purpose of this R-C snubber in the synchronizing cabinet?

I have an R-C snubber in the sync cabinet, which is causing me problems. When the Switch is set to a sync position on any offline generator the voltage on A phase of the generator PT's drops 3 VAC ...
startergo's user avatar
0 votes
1 answer
61 views

Synchronizing multiple ECUs

Say I have an ECU that controls the exterior LED lighting of a building, for aesthetic purposes. Due to the size of the building and the amount of LED strips needed, multiple ECUs are needed, each ...
HV16's user avatar
  • 345
0 votes
1 answer
60 views

How do I implement a simple axistream by my self bus in VHDL?

I'm working on a design right now but I'm struggling with the axistream bus. I just want to be sure that I'm understanding well how it works. To do so I'm using the uvvm library to do a generator that ...
fabrice's user avatar
  • 33
0 votes
2 answers
58 views

How does a hydroturbine induction generator control its own frequency/water flow if it is already excited/pre-determined by the grid?

I was reading this article How do you connect hydro to the grid? and the author states there are two methods. One by a fixed-speed induction generator and another by a grid-tied inverter. I understand ...
t-osu's user avatar
  • 3
0 votes
2 answers
151 views

How does the second flip-flop in a naive synchronizer "prevent a metastable state from propagating"?

In this very nice answer it's explained that, fundamentally, a two flip-flop synchronizer's basic operation is to prevent the propagation of a metastable state (effectively, an invalid logic level) ...
EE18's user avatar
  • 1,161
6 votes
1 answer
783 views

10MHz reference vs 1 PPS vs GPSDO

In the context of Software defined radios (SDRs), what are the differences between using an external 10MHz reference versus using a GPSDO? Why/when would you use one over the other? And how does the ...
BigBrownBear00's user avatar
0 votes
1 answer
189 views

Pulse-per-second (PPS) Interface to FPGA

I am currently working with RFSoC 4x2 boards to implement a network of SDRs and require synchronization across multiple boards to a time reference. I plan to utilize the pulse-per-second (PPS) signal ...
Darinoos47's user avatar
0 votes
0 answers
44 views

How can I emulate the signal sent by a PC sync cable to a Flash from an embedded computing board?

I have a speedlight multispectral flash (KV-FL1) with a PC sync cable that essentially sends an electrical signal when a camera's shutter opens to tell it to fire. PC sync is a Prontour-Compour ...
Jonathan Gaucin's user avatar
7 votes
2 answers
1k views

Series thyristor circuit

I want to build a pulsed energy source and consider up to 6 kV for the storage capacitor voltage. The application is similar to a defibrillator but not for medical purposes. So any insights into what ...
tobalt's user avatar
  • 22.4k
3 votes
2 answers
154 views

Genlock Analog Video

I am currently converting an TMDS signal into composite. Please see block diagram. The video encoder outputs the H-Sync and V-sync. I am also getting an external sync source that I need to use to ...
miggyEE's user avatar
  • 95
0 votes
1 answer
120 views

Synchronizing signal generators with shared LO

I'm currently trying to test my ADC chip using two signal generators. Below figure visually illustrates how the test setup would look like: The traditional approach uses a 10 MHz reference port to ...
Emm386's user avatar
  • 607
0 votes
0 answers
155 views

Building an PTP TSU + RTC module

I want to build a simple Precision Time Protocol Timestamp Unit and Real-Time clock (PTP TSU + RTC module). My accuracy requirement is +-50ns. I found a good opencore ha1588 which fits for RTL part. ...
Ken Tsang's user avatar
0 votes
1 answer
61 views

How computers put signals in order (handling memory (system bus) access in multi-core system)?

My journey started from the question: "If I have 2 cores that want to write values in one memory address at the same (literally) time, how does a computer manage such a situation?" After ...
M.Daniil's user avatar
0 votes
2 answers
167 views

Shared FIFO control module between UART, PS/2 protocol, UART is ok, PS/2 has issue locking on to packets during read

I have brought over a design from a previously provided source in my FPGA. This is the FIFO controller for my system that gets instantiated in both UART sub system, as well as PS/2 sub system. The ...
Vahe's user avatar
  • 171
2 votes
1 answer
102 views

How is this bit of logic generating its short output pulse (and is it supposed to be longer)?

I'm debugging a 1970s bitmap video generator board, and potentially among other issues it's not syncing happily to the old B&W video monitor I'm using (which is quite forgiving). The NTSC video ...
BZo's user avatar
  • 2,131
8 votes
3 answers
3k views

Is HSYNC required during VSYNC for VGA?

As a development to my previous question I am developing a protocol to drive VGA through lines originally designed for SPI communication. The problem is that I may be able to instruct the receiving ...
Anonymous's user avatar
  • 7,120
0 votes
0 answers
126 views

External synchronization of a AD MEMS acceleration sensor (ADXL355)

sadly, the AD help page was not very helpful therefore I'm posting here with the hope that the collective intelligence here can help me with my problem. I'm struggling with the external ...
Steradiant's user avatar
0 votes
0 answers
61 views

180° phase difference alternator synchronisation

Consider two alternators with 180° phase difference in parallel feeding a purely resistive load. In my understanding, phase cancellation will occur. So, what happens to the power in the circuit?
ethelrl's user avatar
  • 99
1 vote
1 answer
35 views

Syncronize 2 digital signals

I have 2 digital signals, and I want them to synchronize. the lower frequency yellow signal takes 32 clock cycles. the higher frequency blue signal takes 8 clock cycles. I need the lower frequency ...
yellowsub's user avatar
4 votes
2 answers
734 views

Why don't 2 flip-flop synchronizers have a reset?

This is similar to this question, asking if a reset is needed in a 2 flip-flop synchronizer. The answer to that question was: "no, not necessarily". So, my question is: Why do almost all of ...
Harry's user avatar
  • 280
2 votes
2 answers
478 views

Why is a reset with asynchronous assert safe?

As far as I understand, a reset with asynchronous assert, synchronous de-assert is considered absolutely safe. I understand that this prevents metastability at the output of a flip-flop using that ...
Harry's user avatar
  • 280
0 votes
1 answer
336 views

Effects of too-frequent serrations in vertical sync pulse on analog horizontal deflection oscillator

Normal analog TV video signal has a vertical sync pulse with serrations to help keeping the horizontal oscillations in sync. Also, as I understand it, in case of an interlaced video, these serrations ...
Dmitri Urbanowicz's user avatar
2 votes
2 answers
489 views

I2S microphone data synchronization for left and right channel

I have I2S MEMS microphones (transmitters, stereo) in slave mode and a microcontroller in master mode. When the WS pin iw 0 (low) the data available on the SD pin is for the left channel (microphone ...
CuriousByte's user avatar
1 vote
1 answer
124 views

How can I synchronize load cell and sensor for sensor calibration?

I have made a glove with some cheap pressure sensors with weight ∝ 1/resistance. DESIRED OUTPUT I now want to create a dataset with columns "Actual Weight" and "Glove Sensor Readout&...
Leo's user avatar
  • 251
0 votes
1 answer
366 views

Why don't the GPS equations account for receiver clock drift?

My basic understanding of GPS is that a network of at least four synchronized satellites send messages containing their locations and transmit times (\$A_i, B_i, C_i\$ and \$t_i\$) to an ...
david11's user avatar
0 votes
0 answers
320 views

Sync stripper circuit for RGsB to RGBHV converter

Currently, I have a RGsB signal source, ISL59885 sync separator and RGBHV monitor. Green is the same on the input and output connector (meaning, sync-on-green, not the perfect clean green signal). ...
tpimh's user avatar
  • 513
0 votes
1 answer
832 views

Synchronizing a clock enable signal with an input clock

I'm designing a basic PCB for testing equipment in lab. The goal is to take a clock input, a clock enable (from a PC indicating that the measurement is beginning), and then distribute it to a number ...
user1850479's user avatar
  • 17.6k
1 vote
3 answers
417 views

Time synchronization of circuits in different places

How can i synchronize times of circuits placed quite far(a few hundreds of meters) from each other? I thought of using PPS signal from GPS receivers, but I'm not sure about this point: Are these PPS ...
berker's user avatar
  • 117
0 votes
2 answers
308 views

Will a synchronous circuit have a race condition if not all inputs arrive before the clock rising edge?

Suppose that the circuit has several inputs from an external circuit which do not have an effect until the clock next rise edge due to using synchronous flip-flops. If the external circuit sends ...
dev65's user avatar
  • 185
1 vote
1 answer
400 views

FPGA SPI slave doesn't work if driving it with the fast FPGA clock instead of with the SPI master clock (oversampling)

I have an slave SPI device implemented within an FPGA (Basys 3). I have had problems to route the SPI clock signal provided by a master to my slave device through one of the board PMOD pins (see this ...
Martel's user avatar
  • 1,259
10 votes
4 answers
2k views

Does the SPI protocol specify how many clock pulses a master device should send to the slave?

I'm trying to implement an SPI device in Verilog. I'm having a lot of problems for coordinating master and slave, since sometimes (with my current impl.) the SPI master device doesn't send enough ...
Martel's user avatar
  • 1,259
13 votes
3 answers
2k views

Do crystal oscillators synchronize by themselves when coupled by supply voltage?

I watched an excellent video about The Surprising Secret of Synchronization There are examples of pendulum clocks or metronomes synchronizing when coupled by a swinging platform. Other examples are ...
Uwe's user avatar
  • 2,853
1 vote
2 answers
298 views

Synchronization of remote sensors

I have a project that involves multiple (5+) remote sensor units (custom PCB with a MCU, WiFi Radio, and sensor), that record data for a short test (<60 seconds). Each sensor records data ...
Kyle Hunter's user avatar
1 vote
2 answers
133 views

Square wave frequency upsample with crystal oscillator

I'm trying to accomplish the following without the use of a microcontroller: Input: A square wave with a 1 Hz period, duty-cycle of 100 ms (10%), normally low. Output: A square wave with a 100 Hz ...
Marco's user avatar
  • 15
1 vote
0 answers
831 views

Question regarding STM32 timer trigger mode for synchronization

I am using STM32L4R5 and need a specific case of synchronization: I am using TIM15 to generate a PWM signal with 50% duty cycle. In my application I have to stop PWM from time to time using the pin as ...
D. K.'s user avatar
  • 131
0 votes
1 answer
62 views

Prevent storing output before computation on button press

For a part of a circuit I am trying to design, I need to make sure the output of the circuit is not stored in a memory cell/RS-latch before it is computed, whenever a button is pressed. As you can ...
kwyntes's user avatar
  • 101
1 vote
0 answers
93 views

How to have a synchronized clock across 3 different components?

I am desiging a TOF measurement application. I am using following components from TI. TDC7200, TDC1000, CC2538. I want to have a synchronized clock across these three. MCU requires 32MHz, TDC sensors ...
ali.hssn's user avatar
0 votes
1 answer
445 views

is it posssible to make a 4-bit up/down asychronous counter using jk flip flops, xnor gates and nothing else?

the image below is supposed to represent the last segment of the circuit, where the 'updown' input would change the direction of the counting: when updown=0 it counts backwards (f,e,d,...1,0,f...) ...
peter griffin's user avatar
0 votes
2 answers
1k views

Synchronization in digital communication

I am an undergraduate student and studying digital communication systems. I am not able to find any good resource where I can self-study about synchronization and it's types (time, frequency and phase ...
Autodidact's user avatar
1 vote
4 answers
900 views

Synchronising self-blinking LEDs (for fun)

I think most here are familiar with Big Clive's super computer, or one of the many variations (and for those who aren't: the links will explain/demonstrate). This effect 'works' because the timing of ...
RobIII's user avatar
  • 207
1 vote
1 answer
423 views

How can I sync an LED with a camera shutter? [closed]

For an academic research project I need to visualise a fast movement. To do so, I need to sync a small (< 6 cm on the longest side) LED light source with the shutter of a high-FPS camera. The FPS ...
ddkk's user avatar
  • 359
1 vote
3 answers
482 views

sync signal on parallel DC/DC-Converters

I am currently designing a circuit to drive a high power laser-module at 12V/40A. I found the idea from Marco Reps https://github.com/marcoreps/laser_driver very inspiring for my design. Since the ...
Leonard Reber's user avatar
1 vote
1 answer
1k views

Generator synchronization to grid and angle difference

Following conditions are needed for generation synchronization : 1 Phase Sequence 2 Voltage Magnitude 3 Frequency 4 Phase Angle I have question about Phase angle assuming that the frequency is the ...
YAKOVM's user avatar
  • 199
1 vote
0 answers
83 views

Confusion in sync-async transmission in RF circuit

I am learning about building an RF transmitter circuit. Now one answer in Answer to DIY RF Transmitter Circuit specified " Very first thing you have to decide on data is whether you want ...
Prasanjit Rath's user avatar
1 vote
2 answers
397 views

Wireless Time Synchronization Project

I am part of a team project involving baseball where we would like to determine whether a runner stepped his foot on the base (first base, for example) before or after a fielder (the first baseman) ...
vr86's user avatar
  • 13
1 vote
0 answers
51 views

Have I understood this solution to the sensor synchronization problem correctly?

I read a research paper which proposes an algorithm to synchronize sensors in a way that is independent of the sensors. Beginning with the simplified version which assumes no drift between the sensor <...
Sam Hammamy's user avatar
0 votes
2 answers
244 views

Synchronizing 2 MCU's ADCs over WiFi

I have 2 devices with analog signals. I want to acquire their signal with 2 MCU's (preferably ARM). fully synchronized with the same sampling frequencies, starting and ending simultaneously user ...
Ali Asghar Pourostad's user avatar
1 vote
1 answer
165 views

Create a synchronous network of 400 devices

I have around 400 devices that i want to address in a star topology. Each device controls a set of LED strips (27*12 resolution). The idea is display a video animation in a good frame per second rate (...
Mohammed BENHADINE's user avatar
0 votes
2 answers
503 views

How does Synchronous Transmission provide synchronized clocks? [duplicate]

I was reading a textbook which says: in synchronous transmission, the bit stream is combined into longer “frames,” which may contain multiple bytes. Each byte, however, is introduced onto the ...
amjad's user avatar
  • 255