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In a discussion about how one can make integrated resistors in a given IC technology, Gray, Hurst, Lewis, and Meyer (Analysis and Design of Analog Integrated Circuits) remark that if we want to use a lightly-doped layer (e.g. a layer targeting the base region in a bipolar technology) then "because the material making up the resistor itself is relatively lightly doped, the resistance displays a relatively large variation with temperature."

I am racking my brain for why low doping implies a large variation with temperature. My first instinct was that there was some allusion to ionization of the dopants as a function of temperature, but as far as I know this ionization fraction is independent of dopant density (indeed, one multiplies this fraction by the nominal number of dopants to get the number of ionized dopants), but perhaps that is wrong. At any rate, what are they alluding to?

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With high doping levels, the sheer number of available carriers keeps the resistance low. With light doping, however, the relatively small number of carriers gives more resistance to the path.

However, changes in temperature will affect the number of carriers by exciting some electrons into the conduction band (for N-type doping, P-type follows similar logic). This might not have much effect on the already generously doped areas which will hardly notice the addition of more carriers, but in a lightly doped material the number of carriers will differ significantly over temperature.

Note that the number of additional carriers added by a temperature rise is fairly independent of doping, it's just more significant when it occurs in a material which has fewer carriers to begin with.

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  • \$\begingroup\$ Ah I think I see. This is an appeal (please correct me if I'm wrong) to the fact that (if we are e.g. n-doped) then we have \$n_0 = \frac{1}{2}\left(N_D + \sqrt{N_D^2 + 4n_i^2} \right)\$ and that, while in the extrinisic region (so that we have full ionization) the only increase with temperature in this expression is via \$n_i\$? \$\endgroup\$
    – EE18
    Commented Jan 18 at 20:49
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    \$\begingroup\$ That's it...you can try plotting that over ni with varying levels of Nd and see the math at work. (Note that by the time silicon hits about 200C, it's basically metal from all the carriers in the conduction band.) \$\endgroup\$ Commented Jan 18 at 21:13
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Just an addendum to say that in another (now-deleted) answer, someone commented that this was a secondary effect and that they suspected that mobility effects were at play -- lightly doped samples are (I guess they are arguing) more susceptible to mobility effects as a function of temperature. Perhaps this is because lightly-doped materials are phonon-limited whereas heavily doped materials are limited by (ionized) dopant scattering sites.


I've gone back into my device physics textbook (del Alamo's Integrated Microelectronic Devices Chapter 4, Figure 4.3) and, indeed, I just want to mention that in addition to your comment it is described there that lowly doped regions (where scattering is dominated by phonons) have a negative temperature coefficient to their mobilities whereas carriers heavily doped regions (where scattering is dominated by ionized impurity, either attractive or repulsive depending on whether or not the carrier is a majority or minority carrier) enjoy a positive temperature coefficient for their mobility (intuitively, since they are going faster they are less scattered by the screened Coulombic potentials of the impurities).

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