MOSFET driver: Totem Pole or NPN Self-Biasing Turn-Off Circuit

Question

I am building a project, where I want to drive some MOSFETs to control for example a 50W 12V LED and it brightness with a PWM signal from an ESP8266 with a frequency in the range of 1-5 kHz.

I found in a TI PDF some circuits which look like they will do the job. (https://www.ti.com/lit/ml/slua618a/slua618a.pdf). One is called "Local NPN Self-Biasing Turn-Off Circuit" (3.4.3) and the other "Bipolar Totem-Pole Driver" (3.2)

My question is now, which one to use. The first version with two NPN transistors would look like following

What I like here is the fact, that only one sort of transistor is used. The goal of my project is that other people could easily build it up without having strong knowledge in electronics. So for this it comes handy that there is only one type of transistor.

The other circuit would look like this:

In the PDF is already a downside mentioned for the NPN-only solution. In the NPN-only circuit there will be always a small current flow as I understood.

Is there anything else to consider? What would be your advice? I am just a hobbyist and have only a basic knowledge of electronics.

I am questioning myself if the argument "only one sort of transistor is used" should be an argument when choosing a driver circuit for the MOSFET?

My project is not battery driven, so some mA of additional current flow would not be the problem.

Thanks in advance!

Edit: I forgot to mention in this post, that I need the MOSFET to be off on default. So inverting the PWM signal in software would not be a solution in my application unfortunately.

Answer 1

A couple of minutes on Mouser yielded these through-hole drivers which should work in your application:

• UC3705 from Texas Instruments

• MIC4426 from Microchip

In the spirit of the question, I think the answer is neither. Both of those designs have deep flaws. The double inverter still uses a 10k pull-up resistor at the gate, which will dramatically slow the rise of gate potential (as I show below).

Your second arrangement arrangement is, strictly speaking, not a totem pole. The term (as far as I've understood it) refers to two transistors of the same polarity, stacked in series. Usually we'd just call this a "push-pull" setup. In this case it's two emitter followers, so the emitters tend to follow the base in potential. That means you need a voltage swing of 12V at the bases to obtain a similar swing at the emitters, requiring an additional stage to convert from 0V/+5V to 0V/+12V, which is absent in your design.

Your argument for sticking to only one type of transistor (NPN or N-channel) is really restrictive. If you properly understand one type, then you also understand the other, and given that in your application you require to both sink and source significant current to/from that FET's gate, it makes no sense to constrain yourself to only one of them.

That said, Michal Podmanický's answer from your previous question comes closest so far, to satisfying that constraint. Now that's a totem pole. The only problem in the context of this question is that it still employs the opto-coupler. It can be modified to connect directly to an MCU's digital output:

^{simulate this circuit – Schematic created using CircuitLab}

On the left is with the booster, on the right without. There are only NPN devices in use. Here the input \$V_{IN}\$ is a 10kHz 0V/+5V square, which produces these gate signals \$V_{G1}\$ (orange) and \$V_{G2}\$ (brown):

The rise time improvement is remarkable, down to a couple of microseconds from 60μs. The slow rise of \$V_{G2}\$ is due, almost entirely, to the combination of gate capacitance and the high value of R5. Lowering R5 will improve rise time, at the cost of greater current through it. Using the components shown, to have a rise time similar to the fall, you'd need resistance R5 of the order of 100Ω, for a stronger "pull-up" which with 12V across it would pass a lot of current:

$$ I_{R5} = \frac{12V}{100\Omega} = 120mA $$

This current would be flowing all the time that the gate is low, and the load is off.

Q2 takes on the role of passing this same large current, but only while gate potential is still low. Once the gate reaches 11V or so, Q2's base-emitter voltage drops, and Q2 switches off. In other words, Q2 bypasses R1, "pulling" \$V_{G1}\$ strongly upwards just as a 100Ω resistor would, but only until the gate reaches the high state. After that, the only current flowing will be through the much larger R1.

As you can see, gate potential is inverted with respect to the input, meaning that drain current will flow through your load when the input is low, or floating. Since you have specified that the default state of the load should be off when the input is floating, you'll need to pull the base of Q1 high with another resistor:

^{simulate this circuit}

Answer 2

There are many ICs that provide a complete MOSFET gate drive solution. This post will provide some guidance on this topic.

https://electronics.stackexchange.com/a/710378/341959

Answer 3

With this totem-pole the gate doesn’t go higher than voltage from ESP-0.7V.

If ESP voltage is 3V3 the gate voltage will be 2.6V only. If 5V the gate voltage 4.3V only.

You need an additional bjt as 12V amplifier:

But remember there is an inverter, so if ESP outputs Low the Load is On.

Btw, I don’t see any reason to use just NPNs.

Answer 4

Neither circuit seems to be a very good choice.

The first circuit has an unnecessary NPN. The second NPN is all that is needed, if you're willing to invert the drive signal polarity. But it will work with a 3.3V logic I/O. At any rate this will provide a somewhat soft turn-on, but have a fast turn-off.

Here's a simplified version that has a default-off behavior (simulate it here):

The second circuit is push-pull. It is designed to provide both fast turn-on and turn-off. Not really helpful for an LED, but ok. However this circuit won't work at all with a 3.3V drive, as it needs a 12V swing to the push-pull pair to get the full swing to the FET gate. You could add a level shifter to the push-pull input to overcome this.

And here's what that looks like (simulate it here)

There are FET driver ICs available that do level shift and push-pull drive, and have some other features as well. I recommend this for best performance. TI, ON Semi, Microchip, Vishay and others make these.

Answer 5

To use less parts with the constraint that you can't software-invert, use a PFET:

^{simulate this circuit – Schematic created using CircuitLab}

This works well because you only have 12V. Also, it will default "OFF" with no GPIO connection. You can include a high value resistor from B to E of Q1 "just to make sure" the circuit is off when not actively driven.